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Criticality Driven Energy Aware Speculation for Speculative Multithreaded Processors

  • Rahul Nagpal
  • Anasua Bhowmik
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3769)

Abstract

Speculative multithreaded architecture (SpMT) philosophy relies on aggressive speculative execution for improved performance. Aggressive speculative execution results in a significant wastage of dynamic energy due to useless computation in the event of mis-speculation. As energy consumption is becoming an important constraint in microprocessor design, it is extremely important to reduce such wastage of dynamic energy in SpMT processors in order to achieve a better performance to power ratio. Dynamic instruction criticality information can be effectively applied to control aggressive speculation in SpMT processors. In this paper, we present a model of micro-execution for SpMT processors to determine dynamic instruction criticality. We also present two novel techniques utilizing criticality information, namely delaying non-critical loads and criticality based thread-prediction for reducing useless computation and energy consumption. Our experiments show 17.71% and 11.63% reduction in dynamic energy for criticality based thread prediction and criticality based delayed load scheme respectively while the corresponding improvements in dynamic energy delay products are 13.93% and 5.54%.

Keywords

Critical Path Power Ratio Dynamic Energy Superscalar Processor Energy Delay Product 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2005

Authors and Affiliations

  • Rahul Nagpal
    • 1
  • Anasua Bhowmik
    • 2
  1. 1.Department of Computer Science and AutomationIndian Institute of ScienceBangaloreIndia
  2. 2.AMD-India Engineering CenterMicroprocessor Solutions SectorBangaloreIndia

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