Skip to main content
SpringerLink
Log in
Book cover

International Conference on Computational and Information Science

CIS 2005: Computational Intelligence and Security pp 236–243Cite as

Hardware-Software Hybrid Packet Processing for Intrusion Detection Systems

  • Conference paper

Part of the book series: Lecture Notes in Computer Science ((LNAI,volume 3802))

Abstract

Security is a major issue in today’s communication networks. Designing Network Intrusion Detection systems (NIDS) calls for high performance circuits in order to keep up with the rising data rates. Offloading software processing to hardware realizations is not an economically viable solution and hence hardware-software based hybrid solutions for the NIDS scenario are discussed in literature. By deploying processing on both hardware and software cores simultaneously by using a novel Intelligent Rule Parsing algorithm, we aim to minimize the number of packets whose waiting time is greater than a predefined threshold. This fairness criterion implicitly ensures in obtaining a higher throughput as depicted by our results.

This is a preview of subscription content, log in via an institution.

Chapter
USD   29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD   169.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever

Tax calculation will be finalised at checkout

Purchases are for personal use only

Learn about institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Snort The Open Source Network Intrusion Detection System, http://www.snort.org

  2. Fisk, M., Varghese, G.: An analysis of fast string matching applied to content-based forwarding and intrusion detection. In: Techical Report CS2001-0670 (updated version), University of California, San Diego (2002)

    Google Scholar 

  3. Sidhu, R., Prasanna, V.K.: Fast regular expression matching using FPGAs. In: IEEE Symposium on Field-Programmable Custom Computing Machines, CA, USA (April 2001)

    Google Scholar 

  4. Singaraju, J., Bu, L., Chandy, J.A.: A Signature Match Processor Architecture for Network Intrusion Detection. In: FCCM 2005 (2005)

    Google Scholar 

  5. Hung, W.N.N., Song, X.: BDD Variable Ordering By Scatter Search. In: Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, ICCD 2001 (2001)

    Google Scholar 

  6. Aho, A., Corasick, M.: Efficient string matching: An aid to bibliographic search. Communications of the ACM 18(6), 333–343 (1975)

    Article  MATH  MathSciNet  Google Scholar 

  7. Boyer, R.S., Moore, J.S.: A fast string searching algorithm. Communications of the ACM 20(10), 762–772 (1977)

    Article  Google Scholar 

  8. Knuth, D., Morris, J., Pratt, V.: Fast pattern matching in strings. SIAM Journal on Computing 6(2), 323–350 (1977)

    Article  MATH  MathSciNet  Google Scholar 

  9. Virtex-II Pro and Virtex-II Pro X Platform FPGAs,.:Complete Data Sheet (v4.3) (2005)

    Google Scholar 

  10. Xilinx ISE 7.0 In-Depth Tutorial, version (2005)

    Google Scholar 

  11. Attig, M., Dharmapurikar, S., Lockwood, J.: Implementation Results of Bloom Filters for String Matching. In: Proceedings of FCCM 2004 (2004)

    Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Applied Research Group, Satyam Computer Services Ltd, Indian Institute of Science, Bangalore, India

    Saraswathi Sachidananda, Srividya Gopalan & Sridhar Varadarajan

Authors
  1. Saraswathi Sachidananda
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Srividya Gopalan
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Sridhar Varadarajan
    View author publications

    You can also search for this author in PubMed Google Scholar

Editor information

Editors and Affiliations

  1. Microelectronic Instiute, Xidian University, 710071, Xi’an, China

    Yue Hao

  2. Department of Computer Science, Hong Kong Baptist University, Kowloon Tong, Hong Kong

    Jiming Liu

  3. School of Computer Science and Technology, Xidian University, Xi’an, China

    Yu-Ping Wang

  4. Department of Computer Science, Hong Kong Baptist University, Hong Kong,  

    Yiu-ming Cheung

  5. School of Electrical and Electronic Engineering, University of Manchester, UK

    Hujun Yin

  6. Life Science Research Center, School of Electronic Engineering, Xidian University, 710071, Xi’an, Shaanxi, China

    Licheng Jiao

  7. Key Laboratory of Computer Networks and Information Security(Ministry of Education), Xidian University, 710071, Xi’an, China

    Jianfeng Ma

  8. National Laboratory of Antennas and Microwave Technology, Xidian University, 710071, Xi’an, Shanxi, P.R. China

    Yong-Chang Jiao

Rights and permissions

Reprints and permissions

Copyright information

© 2005 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Sachidananda, S., Gopalan, S., Varadarajan, S. (2005). Hardware-Software Hybrid Packet Processing for Intrusion Detection Systems. In: Hao, Y., et al. Computational Intelligence and Security. CIS 2005. Lecture Notes in Computer Science(), vol 3802. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11596981_35

Download citation

  • DOI: https://doi.org/10.1007/11596981_35

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-30819-5

  • Online ISBN: 978-3-540-31598-8

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics

Search

Navigation