Abstract
The spectacular advancement in microelectronics resulted in the creation of new system level design languages, such as SystemC, which put fourth new design and verification challenges. In this paper, we present an approach verifying SystemC designs using model checking and assertion based verification. Such verification is enabled through two transformations from SystemC to AsmL (the Abstract State Machines Language) and vice-versa. The soundness of these transformations, proved using abstract interpretation, guarantees the correctness of the model checking results and the validity of the generated assertion monitors (to be checked by simulation). We illustrate our approach on the SystemC/AsmL modeling and verification of the widely used Accelerated Graphics Port (AGP) standard. The verified AGP model can be either refined to implement an AGP core or used to validate existent compatible device.
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Habibi, A., Tahar, S. (2005). An Approach for the Verification of SystemC Designs Using AsmL. In: Peled, D.A., Tsay, YK. (eds) Automated Technology for Verification and Analysis. ATVA 2005. Lecture Notes in Computer Science, vol 3707. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11562948_8
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DOI: https://doi.org/10.1007/11562948_8
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-29209-8
Online ISBN: 978-3-540-31969-6
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