Abstract
Current embedded system designs inspire the adoption of heterogeneous multiprocessor system-on-chip (SoC) technology, in which the architecture model plays a very important role. This paper proposes a distributed architecture model for the heterogeneous multiprocessor SoC design. It takes the view on the system as multiple processing elements connected with a network of communication channels. System functions are refined to primitives provided by the processing elements and communication channels through a hierarchy of abstraction layers. This will be helpful for the enhancement of system design modularity and efficiency.
This work was supported by ”National Natural Science Foundation of China 90207017, 60236020, 60121120706” and ”Hi-Tech Research and Development Program (863) of China 2003AA115110”.
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Wu, Q., Bian, J., Xue, H. (2005). A Distributed Architecture Model for Heterogeneous Multiprocessor System-on-Chip Design. In: Wu, Z., Chen, C., Guo, M., Bu, J. (eds) Embedded Software and Systems. ICESS 2004. Lecture Notes in Computer Science, vol 3605. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11535409_21
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DOI: https://doi.org/10.1007/11535409_21
Publisher Name: Springer, Berlin, Heidelberg
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