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Small Size, Low Power, Side Channel-Immune AES Coprocessor: Design and Synthesis Results

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Part of the book series: Lecture Notes in Computer Science ((LNSC,volume 3373))

Abstract

When cryptosystems are being used in real life, hardware and software implementations themselves present a fruitful field for attacks. Side channel attacks exploit information such as time measurements, power consumption, and electromagnetic emission that leaks from a device when it executes cryptographic applications. When leaked information is correlated to a secret key, an adversary may be able to recover the key by monitoring this information. This paper describes an AES coprocessor that provides complete protection against first-order differential power analysis by embedding a widely used software countermeasure that decorrelates data being processed from the leaked information, so-called data masking, at a hardware level.

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Trichina, E., Korkishko, T., Lee, K.H. (2005). Small Size, Low Power, Side Channel-Immune AES Coprocessor: Design and Synthesis Results. In: Dobbertin, H., Rijmen, V., Sowa, A. (eds) Advanced Encryption Standard – AES. AES 2004. Lecture Notes in Computer Science, vol 3373. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11506447_10

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  • DOI: https://doi.org/10.1007/11506447_10

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-26557-3

  • Online ISBN: 978-3-540-31840-8

  • eBook Packages: Computer ScienceComputer Science (R0)

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