Abstract
Caching recently referenced IP addresses and their forwarding information is an effective strategy to increase routing lookup speed. This paper proposes a multizone non–blocking pipelined cache for IP routing lookup that achieves lower miss rates compared to previously reported IP caches. The twostage pipeline design provides a half–prefix half-full address cache and reduces the cache power consumption. By adopting a very small non-blocking buffer, the cache reduces the effective miss penalty. This cache design takes advantage of storing prefixes but requires smaller table expansions (up to 50% less) compared with prefix caches. Simulation results on real traffic display lower cache miss rate and up to 30% reduction in power consumption.
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Kasnavi, S., Berube, P., Gaudet, V.C., Amaral, J.N. (2005). A Multizone Pipelined Cache for IP Routing. In: Boutaba, R., Almeroth, K., Puigjaner, R., Shen, S., Black, J.P. (eds) NETWORKING 2005. Networking Technologies, Services, and Protocols; Performance of Computer and Communication Networks; Mobile and Wireless Communications Systems. NETWORKING 2005. Lecture Notes in Computer Science, vol 3462. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11422778_46
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DOI: https://doi.org/10.1007/11422778_46
Publisher Name: Springer, Berlin, Heidelberg
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