Abstract
The value of the supply voltage of digital circuits is chosen in such a manner that the critical path fulfills the timing specification under all process and environmental conditions. In general a circuit consists not only of time critical paths. Shorter paths have a much smaller signal propagation delay than required by the system specification. The difference between the maximum allowed delay and the actual delay of a path is called the slack of the respective path. The existence of slack is an indicator that either area or power is wasted without any benefit for the system performance. One way to avoid the waste of power is to supply gates within noncritical paths by a lower supply voltage.
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© 2006 Springer
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Henzler, S. (2006). LOGIC WITH MULTIPLE SUPPLY VOLTAGES. In: Power Management of Digital Circuits in Deep Sub-Micron CMOS Technologies. Advanced Microelectronics, vol 25. Springer, Dordrecht. https://doi.org/10.1007/1-4020-5081-X_2
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DOI: https://doi.org/10.1007/1-4020-5081-X_2
Publisher Name: Springer, Dordrecht
Print ISBN: 978-1-4020-5080-0
Online ISBN: 978-1-4020-5081-7
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