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Part of the book series: The International Series in Engineering and Computer Science ((SECS,volume 868))

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2.5 Conclusion

In this chapter the scaling-down of the CMOS technology is introduced. Then the impact of the CMOS scaling-down to analog circuits is described. For analog circuits, the CMOS scaling-down brings us not only faster transistors, but also many design difficulties. In short, in nanometer CMOS technologies, faster speed but less gain can be obtained from a single transistor, less voltage swings can be provided on the circuit, and better transistor matching can be expected. p]Then the impact of the CMOS scaling-down to the most important part of the mixedsignal circuits, the ADC, is analyzed in different aspects. The most important challenge is the decreased supply voltage. As for ADCs, the direct impact is the reduced signal swing and thus the dynamic range of the ADC is compressed. The decreased supply voltage and the transistor characteristic degradation make the distortion a big challenge for high-linearity ADCs. p]In the next chapter, basic ADC foundations will be introduced. The principles of the ∑-Δ modulators will be also described and different topologies of the ∑-Δ modulators will be analyzed.

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© 2006 Springer

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(2006). ADCs in Nanometer CMOS Technologies. In: Low-Power Low-Voltage Sigma-Delta Modulators in Nanometer CMOS. The International Series in Engineering and Computer Science, vol 868. Springer, Dordrecht. https://doi.org/10.1007/1-4020-4140-3_2

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  • DOI: https://doi.org/10.1007/1-4020-4140-3_2

  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-1-4020-4139-6

  • Online ISBN: 978-1-4020-4140-2

  • eBook Packages: EngineeringEngineering (R0)

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