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CMOS PLL Synthesizers: Analysis and Design pp 127–150Cite as

Loop Filter with Capacitance Multiplier

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Part of the book series: The International Series in Engineering and Computer Science ((SECS,volume 783))

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(2005). Loop Filter with Capacitance Multiplier. In: CMOS PLL Synthesizers: Analysis and Design. The International Series in Engineering and Computer Science, vol 783. Springer, Boston, MA. https://doi.org/10.1007/0-387-23669-4_6

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  • DOI: https://doi.org/10.1007/0-387-23669-4_6

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-0-387-23668-1

  • Online ISBN: 978-0-387-23669-8

  • eBook Packages: EngineeringEngineering (R0)

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