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RF-ESD Co-Design for High Performance CMOS LNAs

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Analog Circuit Design

Abstract

This paper fits within the framework of recent research on the use of pure CMOS, rather than bipolar or BiCMOS technologies for RF front-ends. This paper focuses on the Low Noise Amplifier which is commonly the first building block in a wireless receiver. Since the LNA input pin connects to the outside world, it is sensitive for Electrostatic Discharges (ESD). Although this is a critical issue, very few LNA papers [17][18][23] have been published with ESD-protection results This paper gives guidelines for a rigorous RF-ESD co-design for high performance CMOS LNAs. In this work, two important LNA topologies will be discussed and different strategies for RF-ESD co-design will be explained.

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© 2003 Kluwer Academic Publishers

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Leroux, P., Steyaert, M., Leuven, K.U. (2003). RF-ESD Co-Design for High Performance CMOS LNAs. In: van Roermund, A., Steyaert, M., Huijsing, J.H. (eds) Analog Circuit Design. Springer, Boston, MA. https://doi.org/10.1007/0-306-48707-1_9

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  • DOI: https://doi.org/10.1007/0-306-48707-1_9

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4020-7559-9

  • Online ISBN: 978-0-306-48707-1

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