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A Tutorial Introduction to Symbolic Model Checking

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Book cover Logic for Concurrency and Synchronisation

Part of the book series: Trends in Logic ((TREN,volume 15))

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Abstract

Symbolic model checking is a powerful formal verification technique that, contrarily to theorem proving, requires no user assistance. It is able to verify that an implementation, modelled as a labelled finite-state transition graph, satisfies its specification, given as a set of terms in some temporal logic. This chapter introduces the basics of symbolic model checking. We first give the definition of Kripke structures, our model for finite-state transition graph. Temporal logic model checking, including the specification language CTL (Computation Tree Logic), a less powerful verification technique, is then defined. Symbolic model checking itself is then defined. Throughout this tutorial, we use as a running example the alternate bit protocol to illustrate the different concepts.

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References

  1. R. Alur, C. Courcoubetis, and D.L. Dill. Model-checking for real time systems. In 5th Symposium on Logic in Computer Science, pages 414–425, June 1990.

    Google Scholar 

  2. R. J. Anderson, P. Beame, S. Burns, W. Chan, F. Modugno, D. Notkin, and R. Reese. Model checking large software specifications. In 4th Symposium on the Foundations of Software Engineering, pages 156–166. ACM/SIGSOFT, Oct. 1996.

    Google Scholar 

  3. A. Aziz, S. Taşiran and R.K. Brayton. Bdd variable ordering for interacting finite state machines. In 31st annual conference on Design Automation conference: DAC’94, pages 283–288, 1994.

    Google Scholar 

  4. A. Biere, A. Cimatti, E.M. Clarke, M. Fujita, and Y. Zhu. Symbolic model checking using sat procedures instead of bdds. In 36th Design Automation Conference: DAC’99, number 1579 in Lecture Notes in Computer Science. Springer Verlag, 1999.

    Google Scholar 

  5. K. Brace, R. Rudell, and R. Bryant. Efficient implementation of a bdd package. In 27th ACM/IEEEE Design Automation Conference, pages 40–45, June 1990.

    Google Scholar 

  6. R.E. Bryant. Graph-based algorithm for boolean function manipulation. IEEE Transactions Computers, C(35):1035–1044, 1986.

    Google Scholar 

  7. R.E. Bryant and Y.-A. Chen. Verification of arithmetic circuits with binary moments diagrams. In 32nd ACM/IEEE Design Automation Conference: DAC’95, pages 535–541, 1995.

    Google Scholar 

  8. J.R. Burch, E.M. Clarke, K.L. Mc Millan, D.L. Dill, and J. Hwang. 1020 states and beyond. In LICS’90: 5th annual IEEE symposium on logic in computer science, pages 428–439, Philadelphia, PA, Etats-Unis, June 1990. IEEE.

    Google Scholar 

  9. S. Campos and E. Clarke. The verus language: representing time efficiently with bdds. In AMAST Workshop on Real-Time-Systems, Concurrent and Distributed Software, 1997.

    Google Scholar 

  10. Y.-A. Chen, B. Yang, and R. E. Bryant. Breadth-first with depth-first bdd construction: A hybrid approach. Technical Report CMU-CS-97-120, Carnegie Mellon University, March 1997.

    Google Scholar 

  11. E.M. Clarke and E. A. Emerson. Design and synthesis of synchronization skeletons for branching time temporal logic. In Logics of Programs: Workshop, volume 131 of Lecture Notes in Computer Science, pages 52–71. Springer Verlag, 1981.

    Google Scholar 

  12. E.M. Clarke, E.A. Emerson, and A.P. Sistla. Automatic verification of finite-state concurrent systems using temporal logic specifications. ACM Transactions On Programming Languages and Systems, 8(2):244–263, Apr. 1986.

    Article  Google Scholar 

  13. E.M. Clarke, O. Grumberg, H. Hirashi, S. Jha, D. Long, and K.L. McMillan. Verification of the future-bus+ cache coherence protocol. Formal Methods in Systems Design, 6(2):217–232, 1995.

    Google Scholar 

  14. E.M. Clarke, O. Grumberg, and D.E. Long. 19th Annual Symposium on Principles of Programming Languages, chapter Model checking and abstraction. 1990.

    Google Scholar 

  15. E.M. Clarke, O. Grumberg, K.L. McMillan, and X. Zhao. Efficient generation of counterexamples and witnesses in symbolic model checking. In 32nd ACM/IEEE Design Automation Conference: DAC’95, 1995.

    Google Scholar 

  16. E.M. Clarke, O. Grumberg, and D. Peled. Model Checking. MIT Press, 2000.

    Google Scholar 

  17. E.M. Clarke, M. Khaira, and X. Zhao. Word-level model checking — avoiding the pentium fdiv error. In 33rd ACM/IEEE Design Automation Conference: DAC’96, pages 645–648, 1996.

    Google Scholar 

  18. D. Déharbe and A. Martins Moreira. Symbolic model checking with fewer fixpoint computations. In World Congress on Formal Methods: FM’99, 1999.

    Google Scholar 

  19. D. Déharbe, S. Shankar, and E. Clarke. Model checking vhdl with cv. In FMCAD’98: Formal Methods in Circuit Automation Design, number 1522 in Lecture Notes in Computer Science. Springer Verlag, 1998.

    Google Scholar 

  20. J. Frl, J. Gerlach, and T. Kropf. An efficient algorithm for real-time model checking. In European Design and Test Conference, pages 15–21, 1996.

    Google Scholar 

  21. O. Grumberg and D.E. Long. Model checking and modular verification. ACM Transactions On Programming Languages and Systems, 16(3):843–871, May 1994.

    Article  Google Scholar 

  22. H. Iwashita, T. Nakata, and F. Hirose. CTL model checking based on forward state traversal. In ICCAD’96, page 82, 1996.

    Google Scholar 

  23. W. Lee, A. Pardo, J.-Y. Jang, G. Hachter, and F. Somenzi. Tearing based automatic abstraction for ctl model checking. In International Conference on Computer-Aided Design: ICCAD’96, page 76, 1996.

    Google Scholar 

  24. D.E. Long. Design of a cache-friendly bdd library. In ICCAD’98, pages 639–645, 1998.

    Google Scholar 

  25. K.L. McMillan. Symbolic Model Checking. Kluwer Academic Publishers, 1993.

    Google Scholar 

  26. K.L. McMillan and J. Schwalbe. Shared Memory Multi-Processing, chapter Formal Verification of the Gigamax Cache Coherency Protocol. MIT Press, 1992.

    Google Scholar 

  27. A.R.G. Milner. Calculus of communicating systems, volume 92 of Lecture Notes in Computer Science. Springer-Verlag, 1980.

    Google Scholar 

  28. A. Narayan, A.J. Isles, J. Jain, R.K. Brayton, and A.L. Sangiovanni-Vincentelli. Reachability analysis using partitioned-robdds. In 1997 IEEE/ACM international conference on Computer-aided design: ICCAD’97, pages 388–393. 1997.

    Google Scholar 

  29. J.-P. Queille and J. Sifakis. Specification and verification of concurrent systems in CESAR. In Procs. 5th international symposium on programming, volume 137 of Lecture Notes in Computer Science, pages 244–263. Springer Verlag, 1981.

    Google Scholar 

  30. J. Ruf and T. Kropf. Symbolic model checking for a discrete clocked temporal logic with intervals. In Advances in Hardware Design and Verification — Proceedings of the International Conference on Correct Hardware and Verification Methods: CHARME’97, pages 146–163, 1997.

    Google Scholar 

  31. F. Somenzi. CUDD: CU decision diagrams package — release 2.3.0. Department of Electrical and Computer Engineering, University of Colorado at Boulder, September 1998.

    Google Scholar 

  32. A. Tarski. A lattice-theoretical fixpoint theorem and its applications. Pacific J. Math, pages 285–309, 1955.

    Google Scholar 

  33. Glynn Winskel and Mogens Nielsen. Handbook of Logic in Computer Science. Vol. 4: Semantic Modelling, chapter Models for Concurrency, pages 1–148. Oxford Science Publications, 1995.

    Google Scholar 

  34. B. Yang. Optimizing Model Checking based on BDD Characterization. PhD thesis, School of Computer Science — Carnegie Mellon University, May 1999. Available as research report CMU-CS-99-129.

    Google Scholar 

  35. B. Yang, R.E. Bryant, D.R. O’Hallaron, A. Biere, O. Coudert, G. Janssen, R.K. Ranjan, and F. Somenzi. A performance study of bdd-based model checking. In Formal Methods in Computer-Aided Design: FMCAD’98, number 1522 in Lecture Notes in Computer Science. Springer Verlag, 1998.

    Google Scholar 

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Déharbe, D. (2003). A Tutorial Introduction to Symbolic Model Checking. In: de Queiroz, R.J.G.B. (eds) Logic for Concurrency and Synchronisation. Trends in Logic, vol 15. Springer, Dordrecht. https://doi.org/10.1007/0-306-48088-3_5

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  • DOI: https://doi.org/10.1007/0-306-48088-3_5

  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-1-4020-1270-9

  • Online ISBN: 978-0-306-48088-1

  • eBook Packages: Springer Book Archive

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