Architecting Testbenches

Summary

This chapter focused on the implementation of testbenches for a device under verification. It described an architecture that promotes reusing verification components. The portion of the testbenches that is common between all testcases is structured into a test harness. Each testcase is then implemented on top of the test harness, using a procedural interface to apply stimulus to and monitor response from the device under verification. Although external data files can be used, the configuration of bus-functional models by each testcases should be limited to using the available procedural interfaces.