Modeling of Nyquist D/A Converters
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We have given an overview of different models for current-steering D/A converters.
The modeling should be used as a guidance in determining circuit structure, component sizes, etc., in current steering DACs. From the models, we can also calculate the effect of matching errors.
Using the results in this chapter, we are able to simulate and predict the performance of the DAC on a high abstraction level, with for example Matlab, which saves time, over circuit-level simulations. Mostly, static requirements have been addressed but in the same results can be modified to cover AC as well.
Extending the modeling, we can also use measured result from a DAC, and extract information on the process and the parasitic resistance and capacitance in the circuit.
KeywordsCurrent Source Quantization Noise Resistance Ratio Output Impedance Matching Error
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- P. Hendriks, “Tips for Using High-Speed DACs in Communications Design“, IEEE Electronic Design, no. 2, pp. 112–8, Jan. 1998Google Scholar
- E. Liu and A. Sangiovanni-Vincentelli, “Verification of Nyquist Data Converters Using Behavioral Simulation,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 14, No. 4, April 1995Google Scholar
- J. VandenBussche, G. Van der Plas, G. Gielen, M. Steyaert, W. Sansen, “,” in Proc. of IEEE 1998 Custom Integrated Circuits Conference, CICC’98, pp. 473–6Google Scholar
- J.J. Wikner and N. Tan, “Influence of Circuit Imperfections on the Performance of Current-Steering DACs,” Analog Integrated Circuits and Signal Processing, pp. 7–20, Jan. 1999Google Scholar
- J.J. Wikner, “Measurement and Simulations of a CMOS DAC Chipset,” Internal Report, LiTH-ISY-R-2086, Linköping University, Sweden, Dec. 1998.Google Scholar
- J. J. Wikner, “Measurement and Simulations of a CMOS DAC Chipset,” Internal Report, LiTH-ISY-R-2704, Linköping University, Dec. 1998Google Scholar
- B.E. Jonsson, “Design of Power Supply Lines in High-Performance SI and Current-Mode Circuits,” in Proc. of the 15th Norchip Conf., NORCHIP’97, pp. 245–50, Tallinn, Estonia, Nov. 10–11, 1997Google Scholar
- K.O. Andersson and J.J. Wikner, “Modeling of the Influence of Graded Element Matching Errors in CMOS Current-Steering DACs,” in Proc. of the 17th NorChip Conf., NORCHIP’99, Oslo, Norway, Nov. 8–9, 1999.Google Scholar
- J.J. Wikner and N. Tan, “Modeling of CMOS Digital-to-Analog Converters for Telecommunication,” in Proc. 1998 IEEE International Symposium on Circuits and Systems, ISCAS’98, Monterey, California, USA, May, June 1998Google Scholar