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System-on-a-Chip Verification pp 235–315Cite as

Hardware/Software Co-verification

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Summary

Co-verifying hardware and software in an SOC device calls for new methodologies and tools. The amount of software in SOC devices is also increasing, so software debugging early in design development is even more critical.

Keywords

  • Field Programmable Gate Array
  • Processor Model
  • Rapid Prototype System
  • Simple Block Diagram
  • Field Programmable Gate Array Implementation

These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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© 2002 Kluwer Academic Publishers

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(2002). Hardware/Software Co-verification. In: System-on-a-Chip Verification. Springer, Boston, MA. https://doi.org/10.1007/0-306-46995-2_6

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  • DOI: https://doi.org/10.1007/0-306-46995-2_6

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-0-7923-7279-0

  • Online ISBN: 978-0-306-46995-4

  • eBook Packages: Springer Book Archive