Prototyping new ILP architectures using FPGAs
We are developing a set of custom computer applications coupled with FPGAs and other physical hardware that can be used to emulate an entire processor with monitor functions. This environment provides a working processor research platform complete with operational software that will allow productive computer architecture research to be conducted at both the upper division undergraduate level and at the graduate theses level. The focus of the research component is to devise and test Instruction Level Parallelism (ILP) techniques and mechanisms. The rapid-prototyping platform developed for this effort can be used for several upper division computer architecture and microprocessor courses. The ideas we develop are to be incorporated into the microprocessor and computer architecture curriculum. To implement this system, we have developed a set of VHDL modules to allow for control and monitoring of the processor, a basic operating system with a set of test applications, and a reconfigurable assembler as well as utility and interface applications.
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