Implementation of a parallel and distributed mapping kernel for PARIX

  • Markus Röttger
  • Ulf-Peter Schroeder
  • Jens Simon
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 919)


This paper describes the mapping kernel of the virtual topology library for the commercial run-time system PARIX. The mapping kernel is composed of a collection of injective embedding functions for special interconnection structures of process graphs (virtual topologies) onto a 2-dimensional grid architecture of parallel machines of the MIMD type. Each of these functions realizes a concrete virtual topology by placing each process on a different processor and establishing the communication channels as virtual links with communication primitives of PARIX. The implemented functions were selected under the criteria of fast distributed computation, universal applicability, and small dilation, a well-known cost measure for graph embedding. The virtual topology library supports the implementation of parallel applications and leads to a portable programming and an efficient usage of MIMD-systems.


Mapping Kernel Parallel Application Virtual Link Virtual Topology Graph Embedding 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.



2-dimensional grid/torus


3-dimensional grid/torus


binary hypercube/deBruijn network of dimension n


complete k-ary tree of height n


pipe (1-dimensional grid) with n nodes


ring (1-dimensional torus) with n nodes


star network (one node is connected to each other) with n nodes


clique network (each node is connected to each other) with n nodes


dilation of the embedding of the grid G into the x × y grid


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  1. [AR]
    R. Aleliunas, A. Rosenberg: On Embedding Rectangular Grids in Square Grids, IEEE Transactions on Computers, Vol. C-31, No. 9, 1982.Google Scholar
  2. [A]
    F.S. Annexstein: Parallel Implementations of Graph Embeddings, Parallel Architectures and their efficient use, Springer LNCS, Vol. 678, 1992.Google Scholar
  3. [B]
    K.E. Batcher: Sorting networks and their applications, Proceedings of the AFIPS Spring Joint Computing Conference, Vol. 32, pp. 307–314, 1968.Google Scholar
  4. [CC]
    M.Y. Chan, F.Y.L. Chin: Parallized simulation of grids by hypercubes, Technical Report, University of Hong Kong, October 1990.Google Scholar
  5. [HKMU]
    R. Heckmann, R. Klasing, B. Monien, W. Unger: Optimal Embedding of Complete Binary Trees into Lines and Grids, Proc. 17th Int. Workshop on Graph-Theoretic Concepts in Computer Science (WG91).Google Scholar
  6. [L]
    F.T. Leighton: Introduction to Parallel Algorithms and Architectures, Morgan Kaufmann Publishers, Inc., 1992.Google Scholar
  7. [MaS]
    E. Ma, D.G. Shea: The Embedding Kernel on the IBM Victor Multiprocessor for Program Mapping and Network Reconfiguration, Proc. of the 2nd IEEE Symposium on Parallel and Distributed Processing, 1990.Google Scholar
  8. [MS]
    B. Monien, I.H. Sudborough: Embedding one Interconnection Network in Another, Computing Supplement 7, pp. 257–282, 1990.MathSciNetGoogle Scholar
  9. [P]
    J. Philbin: Virtual Topologies: A New Concurrency Abstraction for High-Level Parallel Languages, DIMACS Workshop on Interconnection Networks and Mapping and Scheduling Parallel Computations, 1994.Google Scholar
  10. [RSS]
    M. Röttger, U.-P. Schroeder, J. Simon: Virtual Topology Library for PARIX, Technical Report No. 148, University of Paderborn, June 1994.Google Scholar
  11. [SS]
    F.C. Sang, I.H. Sudborough: Embedding Large Meshes into Small Ones, Dept. of Computer Science, University of Texas at Dallas, 1990.Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1995

Authors and Affiliations

  • Markus Röttger
    • 1
  • Ulf-Peter Schroeder
    • 1
  • Jens Simon
    • 2
  1. 1.Department of Mathematics and Computer ScienceUniversity of PaderbornGermany
  2. 2.Paderborn Center for Parallel Computing (PC2)PaderbornGermany

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