POMP or how to design a massively parallel machine with small developments

  • Philippe Hoogvorst
  • Ronan Keryell
  • Nicolas Paris
  • Philippe Matherat
Submitted Presentations
Part of the Lecture Notes in Computer Science book series (LNCS, volume 505)


The design of a SIMD machine is usually complex because it leads to developing an efficient Processing Element and to writing all the softwares required by the chip and the control of the machine. We propose a different approach by using an efficient 32-bit off-the-shelf processor with its software environment (compiler and assembler) and a programmable gate array for the network. It limits the development to the minimum and leads to a rather general SIMD cluster built with off-the-shelf chips which can be considered as a SIMD transputer.


Virtual Processor Scalar Code RISC Processor Multistage Interconnection Network Physical Processor 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag Berlin Heidelberg 1991

Authors and Affiliations

  • Philippe Hoogvorst
    • 1
  • Ronan Keryell
    • 1
  • Nicolas Paris
    • 1
  • Philippe Matherat
    • 1
  1. 1.Laboratoire d'Informatique de l'Ecole Normale SupérieureURA 1327 CNRSParis

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