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A bit plane architecture for an image analysis processor implemented with P.L.C.A. gate array

  • J. C. Klein
  • F. Collange
  • M. Bilodeau
Image Features
Part of the Lecture Notes in Computer Science book series (LNCS, volume 427)

Abstract

As Image Analysis resorts to increasingly powerful algorithms, the processing time is correspondingly extended. Consequently, system designers are constantly looking for new technologies and new architectures capable of improving processing speed without increasing the complexity and the cost of the machines.

To achieve this objective, the Centre de Morphologie Mathématique (Ecole des Mines de Paris) has designed and developed, a new image processor for Mathematical Morphology based on Programmable Logic Cell Array (PLCA) technology. This processor, incorporated into the Cambridge Instruments Quantimet 570, is capable of performing complex morphological transformations on 512 × 512 images of 8 bits per pixel at the rate of 27 msec per image. This speed, associated with extensive algorithmic software support, makes it an extremely powerful tool in the field of image analysis.

Keywords

Mathematical Morphology Multiple Instruction Single Data Logic Block Image Processor Image Memory 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 1990

Authors and Affiliations

  • J. C. Klein
    • 1
  • F. Collange
    • 1
  • M. Bilodeau
    • 1
  1. 1.Ecole des Mines de ParisCentre de Morphologie MathématiqueFontainebleau Cedex

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