Efficient simulations of multicounter machines
An oblivious 1-tape Turing machine can on-line simulate a multicounter machine in linear time and logarithmic space. This leads to a linear cost combinational logic network implementing the first n steps of a multicounter machine and also to a linear time/logarithmic space on-line simulation by an oblivious logarithmic cost RAM. An oblivious log *n-head tape unit can simulate the first n steps of a multicounter machine in real-time, which leads to a linear cost combinational logic network with a constant data rate.
KeywordsTuring Machine Input Port Logic Network Simulation Cycle Proof Sketch
Unable to display preview. Download preview PDF.
- MEAD, C.A. & L.A. CONWAY, Introduction to VLSI Systems, Addison-Wesley, NewYork, 1980.Google Scholar
- VITÁNYI, P.M.B., Relativized Obliviousness, in Lecture Notes in Computer Science 88 (1980), 665–672, Springer Verlag, New York. (Proc. MFCS '80).Google Scholar
- VITáNYI, P.M.B., Real-time simulation of multicounters by oblivious one-tape Turing machines, Proceedings 14th ACM Symp. on Theory of Computing, 1982.Google Scholar