Advertisement

Design of CMOS Instrumentation Amplifier Using Three-Stage Operational Amplifier for Low Power Signal Processing

  • Shubham SaurabhEmail author
  • Mujahid Saifi
  • Shylaja V. Karatangi
  • Amrita Rai
Conference paper
  • 44 Downloads
Part of the Algorithms for Intelligent Systems book series (AIS)

Abstract

In this paper, the CMOS Instrumentation amplifier using a three-stage operational Amplifier is presented for low power applications, whose operating power supply is 3 V. The power supply is reduced to decrease the power consumption of the whole circuit. The passive-resistive loads are replaced by active load, i.e. by NMOS (in linear region behaves as a resistor) which reduces the overall chip area and contributes to lesser power dissipation. Active load, in turn, produces higher resistance values compared to passive loads thus results in higher values of power gain. Its large gain can amplify even very small signals ranging from 10−6 Vs to 10−3 Vs. In the previous studies of two-stage Op-amp when operated with resistive load at the output, the overall gain of the circuit is reduced. Also, another problem with two-stage Op-Amp is the trade-off, when we reduce the channel length for increasing speed of Op-Amp then the gain is reduced. Thus, the three-stage Op-amp is presented which can have high gain, high operating speed also when operated at the lesser supply voltage. The proposed Operational amplifier is simulated in H-spice at Level-2 (i.e. 180 nm CMOS technology) and AC analysis results of Avanwaves are shown.

Keywords

Instrumentation amplifier Op-amp CMOS CMRR Power dissipation 

References

  1. 1.
    Sharma BP, Mehra R (2016) Design of CMOS instrumentation amplifier with improved gain & CMRR for low power sensor applications. In: 2nd international conference on next generation computing technologies (NGCT-2016) Dehradun, India 14–16 October 2016Google Scholar
  2. 2.
    Bansal M, Ranjan RD (2017) CMOS instrumentation amplifier design. Int J Electron Electr Comput Sys IJEECS 6(11), ISSN 2348-117XGoogle Scholar
  3. 3.
    Sedra AS, Smith KC (2017) Microelectronic circuits, 6th edn. Oxford university pressGoogle Scholar
  4. 4.
    Ren MY, Zhang CX, Sun DS (2012) Design of CMOS instrumentation amplifier. In: International workshop on information and electronics engineering (IWIEE). ElsevierGoogle Scholar
  5. 5.
    Baker RJ, CMOS circuit design, layout, simulation, 3rd edn. In: IEEE series of microelectronic system. Wiley Publication, IEEE PressGoogle Scholar
  6. 6.
    Bandyopadhyay S, Mukherjee D, Chatterjee R (2014) Design of two stage CMOS operational amplifier in 180 nm technology with low power and high CMRR. ACEEE, 11Google Scholar
  7. 7.
    Saranya RV, Sureshkumar R (2017) CMOS Instrumentation amplifier for biomedical applications. Int J Eng Res Mod Educ (IJERME) 2(1)Google Scholar
  8. 8.
    Yadav AS, Mishra DK (2016) Int J Adv Res Electr Electron Instrum Eng 5(7)Google Scholar
  9. 9.
    Shojaei-Baghini M, Lal RK, Sharma DK (2004) An ultra low-power CMOS instrumentation amplifier for biomedical applications. IEEEGoogle Scholar
  10. 10.
    Worapishet A, Demosthenous A, Liu X (2011) A CMOS Instrumentation Amplifier With 90-dB CMRR at 2-MHz using capacitive neutralization: analysis, design considerations, and implementation. IEEE (4)Google Scholar
  11. 11.
    Sharma A (2015) Design and analysis of CMOS instrumentation amplifier. Int J Electr Electron Eng 2(1)Google Scholar
  12. 12.
    Karnik S, Jain PK, Ajnar DS (2012) Design of CMOS instrumentation amplifier for ECG monitoring system using 0.18 μm technology. Int J Eng Res Appl (IJERA) 2(3)Google Scholar
  13. 13.
    Gupta G, Tripathy MR (2014) CMOS instrumentation amplifier design with 180 nm technology. In: 2014 international conference on circuit, power and computing technologies [ICCPCT]. IEEEGoogle Scholar
  14. 14.
    Schaffer V, Snoeij MF, Ivanov MV, Trifono DT (2009) A 36 V programmable instrumentation amplifier with sub-20 V offset and a CMRR in excess of 120 dB at all gain settings. IEEE J Solid-State Circuits 44(7)CrossRefGoogle Scholar
  15. 15.
    Xiu L, Li Z (2012) Low-power instrumentation amplifier IC design for ECG system applications. In: International workshop on information and electronics engineering (IWIEE). ElsevierGoogle Scholar

Copyright information

© Springer Nature Singapore Pte Ltd. 2020

Authors and Affiliations

  • Shubham Saurabh
    • 1
    Email author
  • Mujahid Saifi
    • 1
  • Shylaja V. Karatangi
    • 1
  • Amrita Rai
    • 1
  1. 1.G.L Bajaj Institute of Technology and ManagementGreater NoidaIndia

Personalised recommendations