Review of Register Transfer Language and Micro-operations for Digital Systems

  • Vijander SinghEmail author
  • Ramesh Chandra Poonia
  • Linesh Raja
  • Isha Choudhary
  • Sai Satya Jain
Conference paper
Part of the Advances in Intelligent Systems and Computing book series (AISC, volume 1045)


Several representations have been proposed from last many years to represent Register Transfer Language (RTL). All description has their different level of success, views, design, and complexity. The primary objective of this paper is to provide a common platform or kernel to discuss all notation of register transfer language that can be described by particular representation. Register Transfer language is an abstraction of circuit switching and able to specify a hardware system from a very low level. The paper also presents the design and control of activities related to RTL. The RTL can be procedural and non-procedural in nature. The behavior of asynchronous control modules architecture has been discussed in further part of the paper. The next section deals with the application to design the complex systems using the register transfer language, instruction set architecture, and organization of the system. Remarks related to simulations, implementation automation capability of the system are given. Finally, the RTLs are analyzed concerning requirements, writing complexity, learning complexity and structural description of a hardware system.


RTL Register Micro-operation PC IR 


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Copyright information

© Springer Nature Singapore Pte Ltd. 2020

Authors and Affiliations

  • Vijander Singh
    • 1
    Email author
  • Ramesh Chandra Poonia
    • 2
    • 3
  • Linesh Raja
    • 1
  • Isha Choudhary
    • 2
  • Sai Satya Jain
    • 2
  1. 1.Manipal University JaipurJaipurIndia
  2. 2.Amity University RajasthanJaipurIndia
  3. 3.Norwegian University of Science and Technology (NTNU)AlesundNorway

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