8-Bit Hybrid DAC with Rail-to-Rail Buffer Amplifier
This paper presents 8-bit differential output of hybrid Digital-to-Analog Converter (DAC) with rail-to-rail buffer using Silterra 0.18 µm CMOS process technology for mixed-signal application. The proposed design combines binary-weighted resistor and thermometer coding, which is able to enhance the speed of the data converter by implementing a small die size area as compared to the conventional architecture. The design achieved standard accuracy of 8-bit resolution with INL and DNL of ±0.5LSB and ±0.7LSB, respectively, and overall power consumption of 56 mW. The performance is accomplished with an effective design area of 133 µm × 172 µm.
KeywordsBinary weighted Current steering Thermometer coding Digital to analog converter
This project was supported by Talent Corporation, with grant number 401/P C EDEC/520108/T 131. The authors would like to express their sincerest appreciation to all group members and the Collaborative Microelectronic Design Excellence Centre (CEDEC).
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