Design of an Area-Efficient FinFET-Based Approximate Multiplier in 32-nm Technology for Low-Power Application

  • V. M. Senthil Kumar
  • S. RavindrakumarEmail author
Conference paper
Part of the Advances in Intelligent Systems and Computing book series (AISC, volume 898)


For applications, where the performance and accuracy are less important inexact computing can be used. The power efficiency increases as the bit-based multiplication is not done for full word length. Applications where speed and power are dominant compared to accuracy inexact multipliers are the first choice. In this approach, the partial products of the approximate multiplier are changed. Two variants of multipliers are designed. One is with CMOS and other with FinFET. The proposed FinFET-based multiplier circuit reduces the leakage current which ultimately results in the power consumption reduction. The proposed compressor-based multiplier reduces the number of operands and partial products. The inexact computing reduces the number of interconnects and components. The proposed multiplier circuits are compared with the existing counterparts and found that the performance improvement is 40.61%. In future, a FinFET-based Multiply-Accumulate unit (MAC) for biomedical application will be proposed.


FinFET CMOS Approximate computing Power saving Array multiplier Multipliers Low area 


  1. 1.
    Momeni., A, Han, J., Montuschi, P., Gu, J., Chung, C.-H.: Ultra low voltage, low power 4-2 compressor for high speed multiplications. In: Proceedings of the International Symposium on Circuits and Systems, pp. 321–324 (2003)Google Scholar
  2. 2.
    Chang, C.H., Jiangmin, G., Zhang, M.: Ultra low voltage low power CMOS 4-2 and 5-2 compressors for fast arithmetic circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 51, 1985–1997 (2004)CrossRefGoogle Scholar
  3. 3.
    Margala, M., Durdle, N.G.: Low power low voltage 4-2 compressors for VLSI applications. In: Proceedings of conference on IEEE Alessandro Volta Memorial Workshop on Low Power Design, pp. 1–7 (1999)Google Scholar
  4. 4.
    Kaur, H., Prakash, N.R.: Area efficient low PDP 8-bit vedic multiplier design using compressors. In: Proceedings of 2nd International Conference on Recent Advances in Engineering and Computational Sciences (RAECS), pp. 1–4 (2015)Google Scholar
  5. 5.
    Whitehouse, J., John, E: Leakage and Delay analysis in FinFET array multiplier circuits. In: Proceedings of Conference on 57th International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 909–912 (2014)Google Scholar
  6. 6.
    Radhakrishnan, D., Preethy, A.P.: Low power CMOS pass logic 42 compressor for high speed multiplication. In: Proceedings of IEEE Conference on ROC, pp. 1296–1298 (2000)Google Scholar
  7. 7.
    Maheshwari, N., Yang, Z., Han, J., Lombardi, F.: A design approach for compressor based approximate multipliers. In: Proceedings of 28th International Conference on VLSI Design and Embedded Systems, pp. 209–214 (2015)Google Scholar
  8. 8.
    Hsiao, S.F., Jiang, M., Yeh, J.: Design of high speed low power 3-2 counter and 4-2 compressor for fast multipliers. Electron. Lett. 34, 341–343 (1998)CrossRefGoogle Scholar
  9. 9.
    Law, C.F., Rofail, S.S., Yeo, K.S.: Low power circuit implementation for partial product addition using pass transistor logic. In: IEEE Proceedings Circuits, Devices and Systems, pp. 124–129 (1999)CrossRefGoogle Scholar
  10. 10.
    Ohkubo, N., Suzuki, M., Shinbo, T., Yamanaka, T., Shimizu, A., Sasalu, K., Nakagome, Y.: A 4.4 ns CMOS 54 × 54b multiplier using pass transistor multiplexer. IEEE J. Solid State Circuits 30, 251–257 (1995)CrossRefGoogle Scholar
  11. 11.
    Hadia, S.K., Patel, R.R., Kosta, Y.P.: FinFET architecture analysis and fabrication mechanism. IJCSI Int. J. Comput. Sci. Issues 8, 235–240 (2011)Google Scholar
  12. 12.
    Rudenko, T., Kilchytska, V., Collaert, N., Nazarov, A., Jurczak, M., Flandre, D.: Electrical characterization and special properties of FinFET structures. In: Proceedings of Conference on Nanoscaled Semiconductor on Insulator Structures and Devices, pp. 199–220 (2007)Google Scholar
  13. 13.
    Rasouli, S.H., Endo, K., Banerjee, K.: Variability analysis of FinFET based devices and circuits considering electrical confinement and width quantization. In: Proceedings of IEEE/ACM International Conference on Computer Aided Design, pp. 505–512 (2009)Google Scholar
  14. 14.
    Sharma, S.: Performance analysis of inverter gate using FinFET and planar bulk MOSFET technologies. Int. J. Electr. Electron. Eng. (IJEEE) 7, 493–506 (2015)Google Scholar
  15. 15.
    Joshi, P., Khandelwal, S., Akashe, S.: High performance FinFET based D flipflop including parameter variation. In: Springer Proceedings in Physics—Advances in Optical Science and Engineering, pp. 239–243 (2015)Google Scholar
  16. 16.
    Mishra, P., Muttreja, A., Jha, N.K.: Gate sizing: FinFET’s vs. 32 nm bulk MOSFETs. Nano Electron. Circuit Des. 2, 23–54 (2011)Google Scholar
  17. 17.
    Rasouli, S.H., Dadgour, H.F., Endo, K., Koike, H., Banerjee, K.: Design optimization of FinFET domino logic considering the width quantization property. IEEE Trans. Electron Devices 57, 2934–2943 (2010)CrossRefGoogle Scholar
  18. 18.
    Tawfik, S.A., Kursun, V.: Low power and compact sequential circuits with independent gate FinFETs. IEEE Trans. Electron Devices 55, 60–70 (2008)CrossRefGoogle Scholar
  19. 19.
    Bhushan, S., Khandelwal, S., Raj, B.: Analyzing different mode FinFET based memory cell at different power supply for leakage reduction. In: Proceedings of Seventh International Conference on Bio Inspired Computing: Theories and Applications (BICTA), pp. 89–100 (2012)Google Scholar
  20. 20.
    Lombardi, F.: Design and analysis of approximate compressors for multiplication. IEEE Trans. Comput. 64, 984–994 (2014)MathSciNetzbMATHGoogle Scholar
  21. 21.
    Menon, R., Radhakrishnan, D.: High performance 5-2 compressor architectures. IEEE Proc. Circuits Devices Syst. 153, 447–452 (2006)CrossRefGoogle Scholar
  22. 22.
    Saravanan, S., Senthil Kumar, V.M.: Design of a reduced carry chain propagation adder using FinFET. Asian J. Inf. Technol. 15, 1670–1677 (2016)Google Scholar

Copyright information

© Springer Nature Singapore Pte Ltd. 2019

Authors and Affiliations

  1. 1.Malla Reddy College of Engineering and TechnologyHyderabadIndia
  2. 2.IRRD AutomatonsKarurIndia

Personalised recommendations