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Memory and Memory Controllers

  • Vaibbhav TaraateEmail author
Chapter

Abstract

In the SOC designs, the transfer of the data from the external memories needs the dedicated memory controller. The SDRAM or DDR memory controllers are used extensively in the SOC designs. The available IPs of such kind of controllers can be integrated with other SOC components. During prototyping, it is essential to have the FPGA equivalent logic of such IP cores. By considering all above, the chapter discusses the memory controllers and their interfaces with the external memory. The timing constraints for such type of controller are decisive factor for the overall design and are discussed in this chapter.

Keywords

SOC Memory controllers SDRAM DDR AHB APB Latency Max and min delay Command Address Data Clk Generated clock Timing Setup Hold Hard core Soft core 

References

Copyright information

© Springer Nature Singapore Pte Ltd. 2019

Authors and Affiliations

  1. 1.1 Rupee S T (Semiconductor Training @ Rs. 1)PuneIndia

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