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Buses and Protocols in SOC Designs

  • Vaibbhav Taraate
Chapter

Abstract

The performance of the SOC is highly dependent on the bus architecture and arbitration schemes. This chapter discusses the few protocols used in the design and their use. The data transfer techniques between the SOC elements are discussed in this chapter. Even this chapter discusses bus architecture and data transfer schemes. The chapter is useful to understand the I2C, SPI, AHB bus protocols.

Keywords

FIFO SPI I2C UART USART AHB Single bus Multiple bus architecture Data rate Latency Throughput Register 

Reference

Copyright information

© Springer Nature Singapore Pte Ltd. 2019

Authors and Affiliations

  1. 1.1 Rupee S T (Semiconductor Training @ Rs. 1)PuneIndia

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