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SOC Prototyping and Debug Techniques

  • Vaibbhav TaraateEmail author
Chapter

Abstract

The chapter discusses the key considerations while choosing the target FPGA and prototyping board to validate the SOC designs. The chapter even covers the multiple FPGA designs and considerations, risk, challenges and how to overcome them. The chapter also covers the Xilinx Zynq-7000 device features and the SOC platform considerations.

Keywords

FPGA LUT CLB MUX Device utilization ROM RAM Block RAM Multiplier Xilinx FPGA Intel FPGA SOC DSP Zynq 7000 Z-7020 PS PL CMT DDR2/DDR3 PLL Ethernet SPI I2C UART CAN 

Reference

Copyright information

© Springer Nature Singapore Pte Ltd. 2019

Authors and Affiliations

  1. 1.1 Rupee S T (Semiconductor Training @ Rs. 1)PuneIndia

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