Static Power Modeling for Modern Processor

  • Jawad Haj-Yahya
  • Avi Mendelson
  • Yosi Ben Asher
  • Anupam Chattopadhyay
Chapter
Part of the Computer Architecture and Design Methodologies book series (CADM)

Abstract

Power and energy estimation tools are essential tools that are used by system designers, software developers, and compiler developers to optimize their products. In this work, we present a novel method for statically estimating and analyzing the energy and power of programs, the method gives power and energy statistics on the feasible program paths for both the core and cache using symbolic execution. Unlike profile-guided optimizations—that require generating stimulus and running them on the target processor to cover all possible paths—or the dataflow analysis that traverse all control flow graph paths, our method traverses all feasible paths of the program. Our method is static, which enables running it at compile-time. We demonstrated how the tool can be used to optimize the power and energy of programs at compile-time by choosing compiler flags that minimize the energy or power of the program.

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Copyright information

© Springer Nature Singapore Pte Ltd. 2018

Authors and Affiliations

  • Jawad Haj-Yahya
    • 1
  • Avi Mendelson
    • 2
  • Yosi Ben Asher
    • 3
  • Anupam Chattopadhyay
    • 4
  1. 1.School of Computer Science and EngineeringNanyang Technological UniversitySingaporeSingapore
  2. 2.Department of Computer Science DepartmentTechnion—Israel Institute of TechnologyHaifaIsrael
  3. 3.Department of Computer ScienceUniversity of HaifaHaifaIsrael
  4. 4.School of Computer Science and EngineeringNanyang Technological UniversitySingaporeSingapore

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