A 36 nW Power Management Unit for Solar Energy Harvesters Using 0.18 \(\upmu \)m CMOS

  • Purvi Patel
  • Biswajit Mishra
  • Dipankar Nagchoudhuri
Conference paper
Part of the Communications in Computer and Information Science book series (CCIS, volume 711)


This work presents the design of ultra low power (ULP) management unit to be used in conjunction with tiny solar cells or energy harvesters providing very low power for wireless sensor node (WSN) applications for energy autonomy. The power management unit (PMU) is implemented using \(0.18\,\upmu \)m CMOS in subthreshold region of MOSFET for reduced power consumption with increased efficiency. It regulates the output voltage at 0.95 V and 0.968 V when the input voltages are 0.98 V and 1.33 V, respectively and achieves maximum 72.3% efficiency. The proposed PMU consumes 36 nW and 56 nW of power, at input voltages of 0.98 V and 1.33 V, respectively, thereby making it suitable for ultra low voltage, low power applications.


Nanowatt PMU ULP Energy harvesting 0.18 \(\upmu \)m CMOS 


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Copyright information

© Springer Nature Singapore Pte Ltd. 2017

Authors and Affiliations

  1. 1.VLSI and Embedded Systems Research GroupDA-IICTGandhinagarIndia

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