Generalized Low-Voltage Circuit Techniques for Very High-Speed Time-Interleaved Analog-to-Digital Converters pp 27-54 | Cite as

# Advanced Low Voltage Circuit Techniques

Chapter

First Online:

## Abstract

While both ROs and SOs can be utilized to avoid the floating switches at the opamp output nodes, many design challenges still exist in a low-voltage environment resulting in overall performance degradation when compared with a conventional design.

## Keywords

Current Mirror Differential Pair Feedback Factor Effective Gain Correlate Double Sampling
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

## References

- 1.M. Keskin, U. Moon, G.C. Temes, A 1-V 10-MHz clock-rate 13-bit CMOS ΔΣ modulator using unity-gain-reset op amps. in
*IEEE J. Solid-St. Circ*.**37**(7), 817–824 (July 2002)CrossRefGoogle Scholar - 2.R. Castello, P.R. Gray, A high-performance micropower switched-capacitor filter. in
*IEEE J. Solid-St. Circ*.**SC-20**(6), 1122–1132 (Dec 1987)Google Scholar - 3.O. Choksi, L.R. Carley, Analysis of switched-capacitor common-mode feedback circuit. in
*IEEE Trans. Circuits Syst. II***50**(12), 906–917 (Dec 2003)CrossRefGoogle Scholar - 4.M. Waltari, K. Halonen, A switched-opamp with fast common mode feedback, in
*Proceedings of International Conference on Electronics, Circuits and Systems*(*ICECS*), vol. 3 (Sept 1999), pp. 1523–1525Google Scholar - 5.M. Waltari, K.A.I. Halonen, 1-V 9-bit pipelined switched-opamp ADC. in
*IEEE J. Solid-St. Circ*.**36**(1), 129–134 (Jan 2001)CrossRefGoogle Scholar - 6.D. Chang, U. Moon, A 1.4-V 10-bit 25-MS/s pipelined ADC using opamp-reset switching technique. in
*IEEE J. Solid-St. Circ*.**38**(8), 1401–1404 (Aug 2003)CrossRefGoogle Scholar - 7.L. Wu, M. Keskin, U. Moon, G. Temes, Efficient common-mode feedback circuits for pseudo-differential switched-capacitor stages, in
*Proceedings of International Symposium on Circuits and Systems*(*ISCAS*), vol. 5 (May 2000), pp. 445–448Google Scholar - 8.A. Baschirotto, R. Castello, G.P. Montagna, Active series switch for switched-opamp circuits. in
*IEE Electron. Lett*.**34**(14), 1365–1366 (July 1998)CrossRefGoogle Scholar - 9.S. Karthikeyan, A. Tamminneedi, C. Boecker, E.K.F. Lee, Design of low-voltage front-end interface for switched-op amp circuits. in
*IEEE Trans. Circuits Syst. II***48**(7), 722–726 (July 2001)CrossRefGoogle Scholar - 10.M. Keskin, A novel low-voltage switched-capacitor input branch. in
*IEEE Trans. Circuits Syst. II***50**(6), 315–317 (June 2003)CrossRefGoogle Scholar - 11.C.C. Enz, G.C. Temes, Circuit techniques for reducing the effects of op-amp imperfections: auto-zeroing, correlated double-sampling, and chopper stabilization. P in
*IEEE***84**(11), 1584–1614 (Nov 1996)CrossRefGoogle Scholar - 12.U. Seng-Pan, R.P. Martins, J.E. Franca, Highly accurate mismatch-free SC delay circuits with reduced finite gain and offset sensitivity, in
*Proceedings of IEEE International Symposium on Circuits and Systems*(*ISCAS*), vol. 2 (May 1999), pp. 57–60Google Scholar - 13.J.F.F. Rijns, H. Wallinga, Spectral analysis of double-sampling switched-capacitor filters. in
*IEEE Trans. Circuits Syst*.**38**(11), 1269–1279 (Nov 1991)CrossRefGoogle Scholar - 14.B.-M. Min, P. Kim, F.W. Bowman III, D.M. Boisvert, A.J. Aude, A 69-mW 10-bit 80-MSample/s pipelined CMOS ADC. in
*IEEE J. Solid-St. Circ*.**38**(12), 2031–2039 (Dec 2003)CrossRefGoogle Scholar - 15.J. Crols, M. Steyaert, Switched-opamp: an approach to realize full CMOS switched-capacitor circuits at very low power supply voltages. in
*IEEE J. Solid-St. Circ*.**29**, 936–942 (Aug 1994)CrossRefGoogle Scholar - 16.P.Y. Wu, V.S.L. Cheung, H.C. Luong, A 1-V 100-MS/s 8-bit CMOS switched-opamp pipelined ADC using loading-free architecture. in
*IEEE J. Solid-St. Circ*.**42**(4), 730–738 (April 2007)CrossRefGoogle Scholar - 17.V.S.L. Cheung, H.C. Luong, W.H. Ki, A 1-V 10.7 MHz switched-opamp bandpass ΣΔ modulator using double-sampling finite-gain-compensation technique. in
*IEEE J. Solid-St. Circ*.**37**(10), 1215–1225 (Oct 2002)CrossRefGoogle Scholar - 18.D. Chang, G. Ahn, U. Moon, Sub-1-V design techniques for high-linearity multistage pipelined analog-to-digital converters. in
*IEEE Trans. Circuits Syst. I***52**(1), 1–12 (Jan 2005)CrossRefGoogle Scholar - 19.G.-C. Ahn et al., A 0.6V 82dB ΔΣ audio ADC using switched-RC integrators, in
*Digest of International Solid-State Circuits Conference (ISSCC)*(Feb 2005), pp. 166–167, 597Google Scholar - 20.S.-W. Sin, U. Seng-Pan, R.P. Martins, A novel very low-voltage SC-CMFB technique for fully-differential reset-opamp circuits, in
*Proceedings of IEEE International Symposium on Circuits and Systems*(*ISCAS*) (May 2005), pp. 1581–1584Google Scholar - 21.S.-W. Sin, U. Seng-Pan, Martins R.P, Novel low-voltage circuit techniques for fully-differential reset- and switched-opamps, in
*Proceedings of PRIME'2005*, vol. 2 (July 2005), pp. 398–401Google Scholar - 22.S.-W. Sin, U. Seng-Pan, R.P. Martins, Generalized circuit techniques for low-voltage high-speed reset- and switched-opamps. in
*IEEE Trans. Circuits Syst. I***55**(8), 2188–2201 (Sept 2008)MathSciNetCrossRefGoogle Scholar - 23.S.-W. Sin, U. Seng-Pan, R.P. Martins, A novel low-voltage cross-coupled passive sampling branch for reset- and switched-opamp circuits, in
*Proceedings of IEEE International Symposium on Circuits and Systems*(*ISCAS*) (May 2005), pp. 1585–1588Google Scholar - 24.A.M.A. Ali, K. Nagaraj, Background calibration of operational amplifier gain error in pipelined A/D converters. in
*IEEE Trans. Circuits Syst. II***50**(8), 631–634 (Sept 2003)Google Scholar - 25.S.-W. Sin, U. Seng-Pan, R.P. Martins, A novel low-voltage finite-gain compensation technique for high-speed reset- and switched-opamp circuits, in
*Proceedings of 2006 IEEE International Symposium on Circuits and Systems - ISCAS’2006*(May 2006), pp. 3794–3797Google Scholar - 26.H. Alzaher, M. Ismai, A CMOS fully balanced differential difference amplifier and its applications. in
*IEEE Trans. Circuits Syst. II***48**(6), 614–620 (June 2001)CrossRefGoogle Scholar - 27.M. Gustavsson et al.,
*CMOS Data Converters for Communications*(Kluwer, Boston, MA, 2000)Google Scholar

## Copyright information

© Springer Science+Business Media B.V. 2010