ReCoNodes—Optimization Methods for Module Scheduling and Placement on Reconfigurable Hardware Devices

  • Ali AhmadiniaEmail author
  • Josef Angermeier
  • Sándor P. Fekete
  • Tom Kamphans
  • Dirk Koch
  • Mateusz Majer
  • Nils Schweer
  • Jürgen Teich
  • Christopher Tessars
  • Jan C. van der Veen


Placement and scheduling are recognized as the most important problems when exploiting the benefit of partially reconfigurable devices such as FPGAs. For example, dynamically loading and unloading modules onto an FPGA causes fragmentation, and—in turn—may decrease performance. To counteract this effect, we use methods from algorithmics and mathematical optimization to increase the performance and present algorithms for placing, scheduling, and defragmenting modules on FPGAs. Taking communication between modules into account, we further present strategies to minimize communication overhead. Finally, we consider scheduling module requests with time-varying resource demands.


Packing Problem Interval Graph Very Large Scale Integration Free Interval Online Strategy 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer Science+Business Media B.V. 2010

Authors and Affiliations

  • Ali Ahmadinia
    • 1
    Email author
  • Josef Angermeier
    • 1
  • Sándor P. Fekete
    • 2
  • Tom Kamphans
    • 2
  • Dirk Koch
    • 1
  • Mateusz Majer
    • 1
  • Nils Schweer
    • 2
  • Jürgen Teich
    • 1
  • Christopher Tessars
    • 2
  • Jan C. van der Veen
    • 2
  1. 1.Hardware/Software Co-Design, Department of Computer ScienceUniversity of Erlangen- NurembergErlangenGermany
  2. 2.Department of Computer ScienceBraunschweigGermany

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