Advertisement

VeriAbs: Verification by Abstraction (Competition Contribution)

  • Bharti Chimdyalwar
  • Priyanka DarkeEmail author
  • Avriti Chauhan
  • Punit Shah
  • Shrawan Kumar
  • R. Venkatesh
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 10206)

Abstract

VeriAbs verifies C programs by transforming them to abstract programs. The transformation replaces loops in the original code by abstract loops of small known bounds. Bounded model checkers can then be used to prove properties over such programs. To perform such a transformation, VeriAbs implements (i) a static value analysis to compute loop invariants, (ii) abstract acceleration and output abstraction for numerical loops, (iii) a novel array witness selection for loops that iterate over arrays, and (iv) an iterative refinement using an enhanced k-induction technique. To find errors, VeriAbs computes bounds of the original loops and then checks for errors within those bounds. VeriAbs can thus prove properties and find errors using bounded model checking. It uses the C Bounded Model Checker (CBMC) version 5.4 with MiniSat version 2.2.

References

  1. 1.
  2. 2.
    Beyer, D., Erkan Keremoglu, M.: CPAchecker: a tool for configurable software verification. CoRR, abs/0902.0019 (2009)Google Scholar
  3. 3.
    Biere, A., Cimatti, A., Clarke, E., Zhu, Y.: Symbolic model checking without BDDs. In: Cleaveland, W.R. (ed.) TACAS 1999. LNCS, vol. 1579, pp. 193–207. Springer, Heidelberg (1999). doi: 10.1007/3-540-49059-0_14 CrossRefGoogle Scholar
  4. 4.
    Clarke, E., Kroening, D., Lerda, F.: A tool for checking ANSI-C programs. In: Jensen, K., Podelski, A. (eds.) TACAS 2004. LNCS, vol. 2988, pp. 168–176. Springer, Heidelberg (2004). doi: 10.1007/978-3-540-24730-2_15 CrossRefGoogle Scholar
  5. 5.
    Darke, P., Chimdyalwar, B., Venkatesh, R., Shrotri, U., Metta, R.: Over-approximating loops to prove properties using bounded model checking. In: DATE 2015, Grenoble, France, 9–13 March 2015, pp. 1407–1412. IEEE (2015)Google Scholar
  6. 6.
    Eén, N., Sörensson, N.: An extensible SAT-solver. In: Giunchiglia, E., Tacchella, A. (eds.) SAT 2003. LNCS, vol. 2919, pp. 502–518. Springer, Heidelberg (2004). doi: 10.1007/978-3-540-24605-3_37 CrossRefGoogle Scholar
  7. 7.
    Khare, S., Saraswat, S., Kumar, S.: Static program analysis of large embedded code base: an experience. In: ISEC, pp. 99–102. ACM (2011)Google Scholar
  8. 8.
    Kumar, S., Chimdyalwar, B., Shrotri, U.: Precise range analysis on large industry code. In: ESEC/FSE 2013, pp. 675–678 (2013)Google Scholar
  9. 9.
    Kumar, S., Sanyal, A., Venkatesh, R., Shah, P.: Property checking array programs using witness sequences. TCS Internal Technical report (2016)Google Scholar

Copyright information

© Springer-Verlag GmbH Germany 2017

Authors and Affiliations

  • Bharti Chimdyalwar
    • 1
  • Priyanka Darke
    • 1
    Email author
  • Avriti Chauhan
    • 1
  • Punit Shah
    • 1
  • Shrawan Kumar
    • 1
  • R. Venkatesh
    • 1
  1. 1.Tata Research Development and Design CenterPuneIndia

Personalised recommendations