Technological Trends and their Impact on the Future of Supercomputers

  • U. Rüde*
Part of the Lecture Notes in Computational Science and Engineering book series (LNCSE, volume 8)

Abstract

Semiconductor technology is advancing at an amazing rate. The changes predicted for the coming 15 years will also have a profound impact on scientific computing. Two of the most important trends are a dramatically increased potential for parallel execution within a single chip, and a serious gap between the speed of memory and the processor. Future computer architectures will force the developers of scientific computing applications to address problems originating from fine grain parallelism and problems caused by the memory bottleneck.

Keywords

Scientific Computing Memory Bandwidth Peak Performance Single Chip Clock Rate 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Alverson, R., Callahan, D., Cummings, D., Koblenz, B., Porterfield, A., Smith, B.: The Tera computer system. Can be downloaded from URL: http://www.tera.com/web/library-psdocs.htmlGoogle Scholar
  2. 2.
    ASCI Red Teraflops Supercomputer. Brochure accessible from URL: http://www.llnl.gov/asci/overview/Google Scholar
  3. 3.
    Burger, D., Goodman, J. R.: Billion-transistor architectures - guest editors’ introduction. IEEE Computer, 30(9), September 1997Google Scholar
  4. 4.
    Dongarra, J., Meuer, H.-W., Strohmeier, E.: TOP500 supercomputer sites, 1997. Can be accessed from URL: http://www.top500.org/.Google Scholar
  5. 5.
    Gärtner, K., Schenk, O., Fichtner, W.: Parallel multigrid methods for the continuity equations in semiconductor device simulation, 1999. Published in these proceedingsGoogle Scholar
  6. 6.
    Hellwagner, H., Kowarschik, M., Rüde, U., Weiß, C.: Data local iterative methods for the efficient solution of partial differential equations, 1998. http://wwwbode.informatik.tu-muenchen.de/Par/arch/cache/index.htmlGoogle Scholar
  7. 7.
    Kozyrakis, C. E., Perissakis, S., Patterson, D. A., Anderson, T. E., Asanovic, K., Cardwell, N., Fromm, R., Golbus, J., Gribstad, B., Keeton, K., Thomas, R., Treuhaft, N., Yelick, K. A.: Scalable processors in the billion-transistor era: Iram. IEEE Computer, 30(9), September 1997Google Scholar
  8. 8.
    Lesartre, G., Hunt, D.: PA-8500: The continuing evolution of the PA-8000 family, 1997. http://www.hp.com/computing/framed/technology/micropro/pa-8500/docs/8500.htmlGoogle Scholar
  9. 9.
    McCalpin, J.: Stream: Measuring sustainable memory bandwidth in high performance computers, http://www.cs.virginia.edu/stream/Google Scholar
  10. 10.
    NEC SX-4. Data obtained from URL: http://www.hlrs.de/hpc/platforms/nec/Google Scholar
  11. 11.
    SEMATECH2: The national technology roadmap for semiconductors, 1997 edition, 1997. Ordering and downloading from URL: http://www.sematech.org/public/roadmap/index.htmGoogle Scholar
  12. 12.
    Altieri, M., Becker, C., Turek, S.: On the realistic performance of linear algebra components in iterative solvers, 1999. Published in these proceedingsGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 1999

Authors and Affiliations

  • U. Rüde*
    • 1
  1. 1.Lehrstuhl für Informatik XUniversität Erlangen-NürnbergErlangenGermany

Personalised recommendations