Simulating Parity Reasoning

  • Tero Laitinen
  • Tommi Junttila
  • Ilkka Niemelä
Part of the Lecture Notes in Computer Science book series (LNCS, volume 8312)


Propositional satisfiability (SAT) solvers, which typically operate using conjunctive normal form (CNF), have been successfully applied in many domains. However, in some application areas such as circuit verification, bounded model checking, and logical cryptanalysis, instances can have many parity (xor) constraints which may not be handled efficiently if translated to CNF. Thus, extensions to the CNF-driven search with various parity reasoning engines ranging from equivalence reasoning to incremental Gaussian elimination have been proposed. This paper studies how stronger parity reasoning techniques in the DPLL(XOR) framework can be simulated by simpler systems: resolution, unit propagation, and parity explanations. Such simulations are interesting, for example, for developing the next generation SAT solvers capable of handling parity constraints efficiently.


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Copyright information

© Springer-Verlag Berlin Heidelberg 2013

Authors and Affiliations

  • Tero Laitinen
    • 1
  • Tommi Junttila
    • 1
  • Ilkka Niemelä
    • 1
  1. 1.Department of Information and Computer ScienceAalto UniversityAaltoFinland

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