A Very High Speed True Random Number Generator with Entropy Assessment

  • Abdelkarim Cherkaoui
  • Viktor Fischer
  • Laurent Fesquet
  • Alain Aubert
Part of the Lecture Notes in Computer Science book series (LNCS, volume 8086)

Abstract

The proposed true random number generator (TRNG) exploits the jitter of events propagating in a self-timed ring (STR) to generate random bit sequences at a very high bit rate. It takes advantage of a special feature of STRs that allows the time elapsed between successive events to be set as short as needed, even in the order of picoseconds. If the time interval between the events is set in concordance with the clock jitter magnitude, a simple entropy extraction scheme can be applied to generate random numbers. The proposed STR-based TRNG (STRNG) follows AIS31 recommendations: by using the proposed stochastic model, designers can compute a lower entropy bound as a function of the STR characteristics (number of stages, oscillation period and jitter magnitude). Using the resulting entropy assessment, they can then set the compression rate in the arithmetic post-processing block to reach the required security level determined by the entropy per output bit. Implementation of the generator in two FPGA families confirmed its feasibility in digital technologies and also confirmed it can provide high quality random bit sequences that pass the statistical tests required by AIS31 at rates as high as 200 Mbit/s.

Keywords

Random number generators Self-timed rings Stochastic models Cryptography engineering 

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References

  1. 1.
    Fischer, V.: A closer look at security in TRNGs design. In: Schindler, W., Huss, S.A. (eds.) COSADE 2012. LNCS, vol. 7275, pp. 167–182. Springer, Heidelberg (2012)CrossRefGoogle Scholar
  2. 2.
    Killmann, W., Schindler, W.: A proposal for Functionality classes for random number generators, version 2.0. Bundesamt fur Sicherheit in der Informationstechnik – BSI (2001), https://www.bsi.bund.de/EN/Home/home_node.htm
  3. 3.
    Tkacik, T.: A Hardware Random Number Generator. In: Kaliski Jr., B.S., Koç, Ç.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 450–453. Springer, Heidelberg (2003)CrossRefGoogle Scholar
  4. 4.
    Majzoobi, M., Koushanfar, F., Devadas, S.: FPGA-Based True Random Number Generation Using Circuit Metastability with Adaptive Feedback Control. In: Preneel, B., Takagi, T. (eds.) CHES 2011. LNCS, vol. 6917, pp. 17–32. Springer, Heidelberg (2011)CrossRefGoogle Scholar
  5. 5.
    Fischer, V., Drutarovsky, M.: True Random Number Generator Embedded in Reconfigurable Hardware. In: Kaliski Jr., B.S., Koç, Ç.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 415–430. Springer, Heidelberg (2003)CrossRefGoogle Scholar
  6. 6.
    Dichtl, M., Golić, J.D.: High-Speed True Random Number Generation with Logic Gates Only. In: Paillier, P., Verbauwhede, I. (eds.) CHES 2007. LNCS, vol. 4727, pp. 45–62. Springer, Heidelberg (2007)CrossRefGoogle Scholar
  7. 7.
    Sunar, B., Martin, W.J., Stinson, D.R.: A Provably Secure True Random Number Generator with Built-In Tolerance to Active Attacks. In: IEEE Transactions on Computers, vol. 58, pp. 109–119 (2007)Google Scholar
  8. 8.
    Bernard, F., Fischer, V., Valtchanov, B.: Mathematical Model of Physical RNGs Based on Coherent Sampling. Tatra Mt. Math. Publ. 45, 1–14 (2010)MathSciNetMATHGoogle Scholar
  9. 9.
    Cherkaoui, A., Fischer, V., Aubert, A., Fesquet, L.: Comparison of Self-timed and Inverter Ring Oscillators as Entropy Sources in FPGAs. In: Proceedings of DATE 2012, Design, Automation and Test in Europe, DATE 2012, Dresden, Germany, pp. 1325–1330 (2012)Google Scholar
  10. 10.
    Cherkaoui, A., Fischer, V., Aubert, A., Fesquet, L.: A Self-timed Ring Based True Random Number Generator. In: Proceedings of ASYNC 2013, International Symposium on Advanced Research in Asynchronous Circuits and Systems, Santa Monica, California, USA, pp. 99–106 (2013)Google Scholar
  11. 11.
    A statistical test suite for random and pseudorandom number generators for cryptographic applications. In: NIST Special Publication (SP) 800-22 rev. 1 (2008), http://csrc.nist.gov/CryptoToolKit/tkrng.html
  12. 12.
    Bochard, N., Bernard, F., Fischer, V., Valtchanov, B.: True-Randomness and Pseudo-Randomness in Ring Oscillator-Based True Random Number Generators. International Journal of Reconfigurable Computing 2010, article ID 879281 (2010)Google Scholar
  13. 13.
    Winstanley, A., Greenstreet, M.R.: Temporal Properties of Self-Timed Rings. In: Margaria, T., Melham, T.F. (eds.) CHARME 2001. LNCS, vol. 2144, p. 140. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  14. 14.
    Fairbanks, S.: High Precision Timing Using Self-timed Circuits. In: Technical report no. UCAM-CL-TR-738, University of Cambridge, Computer Laboratory (2009), http://www.cl.cam.ac.uk/techreports/UCAM-CL-TR-738.pdf
  15. 15.
    Hamon, J., Fesquet, L., Miscopein, B., Renaudin, M.: High-Level Time-Accurate Model for the Design of Self-Timed Ring Oscillators. In: Proceedings of ASYNC 2008, International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 29–38 (2008)Google Scholar
  16. 16.
    Sutherland, I.E.: Micropipelines. Communications of the ACM (Association of Computing Machinery) 32(6), 720–738 (1989)CrossRefGoogle Scholar
  17. 17.
    Davies, R.B.: Exclusive OR (XOR) and hardware random number generators (2002), http://www.robertnz.net/pdf/xor2.pdf
  18. 18.
    Elissati, O., Yahya, E., Rieubon, S., Fesquet, L.: A novel high-speed multi-phase oscillator using self-timed rings. In: International Conference of Microelectronics, ICM 2010, pp. 204–207 (2010)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2013

Authors and Affiliations

  • Abdelkarim Cherkaoui
    • 1
    • 2
  • Viktor Fischer
    • 1
  • Laurent Fesquet
    • 2
  • Alain Aubert
    • 1
  1. 1.Hubert Curien LaboratoryUMR CNRS 5516Saint-EtienneFrance
  2. 2.TIMA LaboratoryUMR CRNS 5159GrenobleFrance

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