Boolean Logic Circuits on Nanowire Networks and Related Technologies

  • Seiya Kasai
  • Hong-Quan Zhao
  • Yuta Shiratori
  • Tamer Mohamed
  • Svetlana N. Yanushkevich
Chapter
Part of the Nano-Optics and Nanophotonics book series (NON)

Abstract

Implementation of graph-based logic circuits on semiconductor nanowire networks and related technologies are described. Boolean logic function is graphically represented utilizing a binary decision diagram (BDD), unlike the conventional logic circuit in which a logic gate has a specific function as a logic operator. Logical graph structure is topologically transferred to a semiconductor nanowire network structure. BDD 2-bit arithmetic logic unit (ALU) is demonstrated on a GaAs-based regular nanowire network with hexagonal topology. A reconfigurable BDD logic circuit based on Shannon’s expansion of Boolean logic function and Fault-tolerant BDD on the basis of an error-correcting technique are also described.

Notes

Acknowledgments

This work is partly supported by Grants-in-Aid for Scientific Research from Japan Society for Promotion of Science (JSPS), Japan and by Natural Sciences and Engineering Research Council (NSERC) of Canada. Dr. Yanushkevich and Dr. Kasai acknowledge JSPS Invited Fellowship program. Mr. T. Mohamed acknowledges the iCore program (Alberta, Canada).

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Copyright information

© Springer-Verlag Berlin Heidelberg 2014

Authors and Affiliations

  • Seiya Kasai
    • 1
  • Hong-Quan Zhao
    • 1
  • Yuta Shiratori
    • 1
  • Tamer Mohamed
    • 2
  • Svetlana N. Yanushkevich
    • 2
  1. 1.Graduate School of Information Science and Technology and Research Center for Integrated Quantum ElectronicsHokkaido UniversitySapporoJapan
  2. 2.Department of Electrical and Computer EngineeringUniversity of CalgaryCalgaryCanada

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