Exploring the Relations between Fault Sensitivity and Power Consumption
This paper qualitatively explores the relations between two kinds of side-channel leakages, i.e., the fault sensitivity (FS) and the power consumption. The FS is a relatively new active side-channel leakage, while the power consumption is one of the earliest researched passive side-channel leakage. These two side-channels are closely related with regard to both the security evaluation and the countermeasure proposal. This paper experimentally answers the following important issues such as the relationship between these two side-channels, whether they share the same leakage function and whether they can be protected by the same countermeasure. Based on two FPGA AES implementations without countermeasures, we first confirm a high correlation between the power consumption and the FS. Then, we construct the leakage profiles for the FS and the power consumption to explain the detailed relations between them. We also confirm a successful key recovery using the FS profile as the leakage model for power consumption. Based on these discoveries, we believe that FSA can be used as an evaluation tool to find the first-order leakage with less data-complexity, and it is more reasonable to achieve the countermeasures against FSA and power analysis from different design levels.
KeywordsSide-channel attacks fault sensitivity power consumption AES
Unable to display preview. Download preview PDF.
- 1.DPA contest website, http://www.dpacontest.org/home/
- 4.Endo, S., Li, Y., Homma, N., Sakiyama, K., Ohta, K., Aoki, T.: An efficient countermeasure against fault sensitivity analysis using configurable delay blocks. In: Bertoni, G., Gierlichs, B. (eds.) FDTC, pp. 95–102. IEEE (2012)Google Scholar
- 8.Kocher, P.C.: Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems. In: Koblitz, N. (ed.) CRYPTO 1996. LNCS, vol. 1109, pp. 104–113. Springer, Heidelberg (1996)Google Scholar
- 10.Li, Y., Nakatsu, D., Li, Q., Ohta, K., Sakiyama, K.: Clockwise collision analysis – overlooked side-channel leakage inside your measurements. Cryptology ePrint Archive, Report 2011/579 (2011), http://eprint.iacr.org/
- 11.Li, Y., Ohta, K., Sakiyama, K.: Revisit fault sensitivity analysis on WDDL-AES. In: HOST, pp. 148–153. IEEE Computer Society (2011)Google Scholar
- 13.Li, Y., Ohta, K., Sakiyama, K.: Toward effective countermeasures against an improved fault sensitivity analysis. IEICE Transactions 95-A(1), 234–241 (2012)Google Scholar
- 15.Mangard, S., Oswald, E., Popp, T.: Power analysis attacks - revealing the secrets of smart cards. Springer (2007)Google Scholar
- 18.National Institute of Advanced Industrial Science and Technology (AIST), Research Center for Information Security (RCIS). Side-channel Attack Standard Evaluation Board (SASEBO), http://staff.aist.go.jp/akashi.satoh/SASEBO/en/index.html
- 20.Research Center for Information Security (RCIS) of National Institute of Advanced Industrial Science and Technology. SASEBO project overviewGoogle Scholar
- 25.Tiri, K., Verbauwhede, I.: A Logic Level Design Methodology for a Secure DPA ResistantASIC or FPGA Implementation. In: DATE, pp. 246–251. IEEE Computer Society (2004)Google Scholar