Analysis Support for TADL2 Timing Constraints on EAST-ADL Models

  • Arda Goknil
  • Jagadish Suryadevara
  • Marie-Agnès Peraldi-Frati
  • Frédéric Mallet
Part of the Lecture Notes in Computer Science book series (LNCS, volume 7957)


It is critical to analyze characteristics of real-time embedded systems, such as timing behavior, early in the development. In the automotive domain, EAST-ADL is a concrete example of the model-based approach for the architectural modeling of real-time systems. The Timing Augmented Description Language v2 (TADL2) allows for the specification of timing constraints on top of EAST-ADL models. In this paper we propose a formal validation & verification methodology for timing behaviors given with TADL2. The formal semantics of the timing constraints is given as a mapping to the Clock Constraint Specification Language (CCSL), a formal language that implements the MARTE Time Model. Based on such a mapping, the validation is carried out by the simulation of TADL2 specifications. The simulation allows for a rapid prototyping of TADL2 specifications. The verification is performed based on a TADL2 mapping to timed automata modeling using the Uppaal model-checker. The whole process is illustrated on a Brake-By-Wire application.


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  1. 1.
  2. 2.
    ITEA TIMMO-2-USE Project,
  3. 3.
    TADL2-CCSL QVTo Transformation,
  4. 4.
    Aegedal, J.: Quality of service support in development of distributed systems. PhD Thesis (2001)Google Scholar
  5. 5.
    Alfonso, A., Braberman, V.A., Kicillof, N., Olivero, A.: Visual timed event scenarios. In: ICSE 2004, pp. 168–177 (2004)Google Scholar
  6. 6.
    Alur, R., Dill, D.L.: A theory of timed automata. Theoretical Computer Science 126(2), 183–235 (1994)MathSciNetMATHCrossRefGoogle Scholar
  7. 7.
    André, C.: Syntax and semantics of the Clock Constraint Specification Language (CCSL). Research Report 6925, INRIA (May 2009)Google Scholar
  8. 8.
    André, C., Mallet, F., de Simone, R.: Modeling time(s). In: Engels, G., Opdyke, B., Schmidt, D.C., Weil, F. (eds.) MoDELS 2007. LNCS, vol. 4735, pp. 559–573. Springer, Heidelberg (2007)CrossRefGoogle Scholar
  9. 9.
    ATESST (Advancing Traffic Efficiency through Software Technology). East-ADL2 specification (March 20, 2008),
  10. 10.
    Autosar Consortium. AUTOSAR specification, release 4.0 (2009),
  11. 11.
    DeAntoni, J., Mallet, F.: Timesquare: Treat your models with logical time. In: Furia, C.A., Nanz, S. (eds.) TOOLS Europe 2012. LNCS, vol. 7304, pp. 34–41. Springer, Heidelberg (2012)CrossRefGoogle Scholar
  12. 12.
    Dvorak, R.: Model transformation with operational qvt. In: EclipseCon 2008 (2008)Google Scholar
  13. 13.
    Enoiu, E.P., Marinescu, R., Seceleanu, C.C., Pettersson, P.: Vital: A verification tool for EAST-ADL models using uppaal port. In: ICECCS 2012, pp. 328–337 (2012)Google Scholar
  14. 14.
    IEEE Standards Association. IEEE Standard for Verilog Hardware Description Language. Design Automation Standards Committee, IEEE Std 1364TM-2005 (2005)Google Scholar
  15. 15.
    Kang, E.-Y., Schobbens, P.-Y., Pettersson, P.: Verifying functional behaviors of automotive products in EAST-ADL2 using uppaal-port. In: Flammini, F., Bologna, S., Vittorini, V. (eds.) SAFECOMP 2011. LNCS, vol. 6894, pp. 243–256. Springer, Heidelberg (2011)CrossRefGoogle Scholar
  16. 16.
    Klein, F., Giese, H.: Joint structural and temporal property specification using timed story scenario diagrams. In: Dwyer, M.B., Lopes, A. (eds.) FASE 2007. LNCS, vol. 4422, pp. 185–199. Springer, Heidelberg (2007)CrossRefGoogle Scholar
  17. 17.
    Larsen, K.G., Pettersson, P., Yi, W.: Uppaal in a Nutshell. Int. Journal on Software Tools for Technology Transfer 1(1-2), 134–152 (1997)MATHCrossRefGoogle Scholar
  18. 18.
    OMG. UML Profile for MARTE, v1.0. Object Management Group (November 2009) (formal/2009-11-02)Google Scholar
  19. 19.
    Peraldi-Frati, M.A., Goknil, A., DeAntoni, J., Nordlander, J.: A timing model for specifying multi clock automotive systems: The timing augmented description language v2. In: ICECCS 2012, pp. 230–239 (2012)Google Scholar
  20. 20.
    Qureshi, T.N., Chen, D.-J., Törngren, M.: A timed automata-based method to analyze EAST-ADL timing constraint specifications. In: Vallecillo, A., Tolvanen, J.-P., Kindler, E., Störrle, H., Kolovos, D. (eds.) ECMFA 2012. LNCS, vol. 7349, pp. 303–318. Springer, Heidelberg (2012)CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2013

Authors and Affiliations

  • Arda Goknil
    • 1
  • Jagadish Suryadevara
    • 2
  • Marie-Agnès Peraldi-Frati
    • 1
  • Frédéric Mallet
    • 1
  1. 1.AOSTE Team, UNS-I3S-INRIASophia-AntipolisFrance
  2. 2.Formal Modeling and Analysis GroupMälardalen UniversityVästeråsSweden

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