Quarantining Weakness

Compositional Reasoning under Relaxed Memory Models (Extended Abstract)
  • Radha Jagadeesan
  • Gustavo Petri
  • Corin Pitcher
  • James Riely
Part of the Lecture Notes in Computer Science book series (LNCS, volume 7792)


In sequential computing, every method of an object can be described in isolation via preconditions and postconditions. However, reasoning in a concurrent setting requires a characterization of all possible interactions acrossmethod invocations.Herlihy and Wing [1990]’s notion of linearizability simplifies such reasoning by intuitively ensuring that each method invocation “takes effect” between its invocation and response events.


  1. Abramsky, S., Gay, S.J., Nagarajan, R.: Interaction categories and the foundations of typed concurrent programming. In: NATO ASI DPD, pp. 35–113 (1996)Google Scholar
  2. Adve, S.V., Boehm, H.-J.: Memory models: a case for rethinking parallel languages and hardware. Commun. ACM 53, 90–101 (2010)CrossRefGoogle Scholar
  3. Adve, S.V., Gharachorloo, K.: Shared memory consistency models: A tutorial. Computer 29(12), 66–76 (1996)CrossRefGoogle Scholar
  4. Alur, R., Madhusudan, P.: Adding nesting structure to words. J. ACM 56(3) (2009)Google Scholar
  5. Batty, M., Owens, S., Sarkar, S., Sewell, P., Weber, T.: Mathematizing C++ concurrency. In: POPL, pp. 55–66. ACM (2011)Google Scholar
  6. Batty, M., Dodds, M., Gotsman, A.: Library abstraction for C/C++ concurrency. In: POPL (2013) (to appear)Google Scholar
  7. Boehm, H.-J., Adve, S.V.: Foundations of the C++ concurrency memory model. In: PLDI, pp. 68–78. ACM (2008)Google Scholar
  8. Burckhardt, S., Gotsman, A., Musuvathi, M., Yang, H.: Concurrent Library Correctness on the TSO Memory Model. In: Seidl, H. (ed.) ESOP 2012. LNCS, vol. 7211, pp. 87–107. Springer, Heidelberg (2012)CrossRefGoogle Scholar
  9. Demange, D., Laporte, V., Zhao, L., Jagannathan, S., Pichardie, D., Vitek, J.: Plan B: A buffered memory model for Java. In: POPL (2013) (to appear)Google Scholar
  10. Ferreira, R., Feng, X., Shao, Z.: Parameterized Memory Models and Concurrent Separation Logic. In: Gordon, A.D. (ed.) ESOP 2010. LNCS, vol. 6012, pp. 267–286. Springer, Heidelberg (2010)CrossRefGoogle Scholar
  11. Filipovic, I., O’Hearn, P., Rinetzky, N., Yang, H.: Abstraction for concurrent objects. Theoretical Comp. Sci. 411, 4379–4398 (2010)MathSciNetzbMATHCrossRefGoogle Scholar
  12. Gotsman, A., Yang, H.: Linearizability with Ownership Transfer. In: Koutny, M., Ulidowski, I. (eds.) CONCUR 2012. LNCS, vol. 7454, pp. 256–271. Springer, Heidelberg (2012)CrossRefGoogle Scholar
  13. Gotsman, A., Musuvathi, M., Yang, H.: Show No Weakness: Sequentially Consistent Specifications of TSO Libraries. In: Aguilera, M.K. (ed.) DISC 2012. LNCS, vol. 7611, pp. 31–45. Springer, Heidelberg (2012)CrossRefGoogle Scholar
  14. Herlihy, M., Wing, J.M.: Linearizability: A correctness condition for concurrent objects. ACM Trans. Program. Lang. Syst. 12(3), 463–492 (1990)CrossRefGoogle Scholar
  15. Jagadeesan, R., Pitcher, C., Riely, J.: Generative Operational Semantics for Relaxed Memory Models. In: Gordon, A.D. (ed.) ESOP 2010. LNCS, vol. 6012, pp. 307–326. Springer, Heidelberg (2010)CrossRefGoogle Scholar
  16. Jeffrey, A., Rathke, J.: A fully abstract testing semantics for concurrent objects. Theoretical Comp. Sci. 338, 17–63 (2005)MathSciNetzbMATHCrossRefGoogle Scholar
  17. Lamport, L.: How to make a multiprocessor computer that correctly executes multiprocess program. IEEE Trans. Comput. 28(9), 690–691 (1979)zbMATHCrossRefGoogle Scholar
  18. Manson, J., Pugh, W., Adve, S.V.: The Java memory model. In: POPL, pp. 378–391 (2005)Google Scholar
  19. Owens, S.: Reasoning about the Implementation of Concurrency Abstractions on x86-TSO. In: D’Hondt, T. (ed.) ECOOP 2010. LNCS, vol. 6183, pp. 478–503. Springer, Heidelberg (2010)CrossRefGoogle Scholar
  20. Sarkar, S., Sewell, P., Alglave, J., Maranget, L., Williams, D.: Understanding power multiprocessors. In: PLDI, pp. 175–186. ACM (2011)Google Scholar
  21. Sevcík, J.: Program Transformations in Weak Memory Models. PhD thesis, Laboratory for Foundations of Computer Science, University of Edinburgh (2008)Google Scholar
  22. Sewell, P., Sarkar, S., Owens, S., Nardelli, F.Z., Myreen, M.O.: x86-TSO: a rigorous and usable programmer’s model for x86 multiprocessors. Commun. ACM 53(7), 89–97 (2010)CrossRefGoogle Scholar
  23. SPARC, Inc.: The SPARC Architecture Manual (version 9). Prentice-Hall, Inc., Upper Saddle River (1994)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2013

Authors and Affiliations

  • Radha Jagadeesan
    • 1
  • Gustavo Petri
    • 2
  • Corin Pitcher
    • 1
  • James Riely
    • 1
  1. 1.DePaul UniversityUSA
  2. 2.Purdue UniversityUSA

Personalised recommendations