Advertisement

Combining Theorem Proving and Symbolic Trajectory Evaluation in THM&STE

  • Yongjian Li
  • Naiju Zeng
  • William N. N. Hung
  • Xiaoyu Song
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 7261)

Abstract

In this paper, we present a tool THM&STE, which combines theorem proving with symbolic trajectory evaluation. With the help of theorem proving, a large property is decomposed into smaller properties, which can be handled directly by running STE. Besides the support of decomposition by the classical STE laws, some novel techniques such as simplification on the assertions based on causal dependency between nodes, symmetry reduction, tacticals are provided in THM&STE.

Keywords

Theorem Prove Symmetry Reduction Causal Dependency Proof Script Memory Line 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Aagaard, M.D., Jones, R.B., Seger, C.J.H.: Combining theorem proving and trajectory evaluation in an industrial environment. In: Design Automation Conference, pp. 538–541. ACM, San Francisco (1998)Google Scholar
  2. 2.
    Hazelhurst, S., Seger, C.J.: Symbolic Trajectory Evaluation. In: Kropf, T. (ed.) Formal Hardware Verification. LNCS, vol. 1287, pp. 3–78. Springer, Heidelberg (1997)CrossRefGoogle Scholar
  3. 3.
    Hunt Jr., W.A., Swords, S., Davis, J., Slobodova, A.: Use of Formal Verification at Centaur Technology. In: Hardin, D.S. (ed.) Design and Verification of Microprocessor Systems for High Assurance Applications, pp. 65–88. Springer (2010)Google Scholar
  4. 4.
    Intel Corporation: Forte/fl user guide, 2003 edn. (2003)Google Scholar
  5. 5.
    Li, Y.: Formalization of symbolic trajectory semantics (2009), http://lcs.ios.ac.cn/~lyj238/steSymmetry.html
  6. 6.
    Li, Y., Zeng, N.: Enhanced symbolic simulation of a round-robin arbiter (2011), http://lcs.ios.ac.cn/~lyj238/roundRobin.html
  7. 7.
    Li, Y., Zeng, N.: Symmetry reduction in enhanced symbolic simulation (2011), http://lcs.ios.ac.cn/~lyj238/gsteSymmetry.html
  8. 8.
    Li, Y.: Case study of cam (2011), http://lcs.ios.ac.cn/~lyj238/papers/cam.fl
  9. 9.
    O’Leary, J., Zhao, X., Gerth, R., Seger, C.J.H.: Formally verifying IEEE compliance of floating-point hardware. Intel Technology Journal Q1, 147–190 (1999)Google Scholar
  10. 10.
    Seger, C.J.H., Bryant, R.E.: Formal verification by symbolic evaluation of partially-ordered trajectories. Formal Methods in System Design 6(2), 147–189 (1995)CrossRefGoogle Scholar
  11. 11.
    Seger, C.J.H., Jones, R.B., O’Leary, J.W., Melham, T., Aagaard, M.D., Barrett, C., Syme, D.: An industrially effective environment for formal hardware verification. IEEE Transactions on Computer-Aided Design 24(9), 1381–1405 (2005)CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2012

Authors and Affiliations

  • Yongjian Li
    • 1
  • Naiju Zeng
    • 1
  • William N. N. Hung
    • 2
  • Xiaoyu Song
    • 3
  1. 1.Chinese Academy of SciencesBeijingChina
  2. 2.Synopsys Inc.Mountain ViewUSA
  3. 3.Portland State UniversityOregonUSA

Personalised recommendations