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Modeling and Analysis of CPU Usage in Safety-Critical Embedded Systems to Support Stress Testing

  • Shiva Nejati
  • Stefano Di Alesio
  • Mehrdad Sabetzadeh
  • Lionel Briand
Part of the Lecture Notes in Computer Science book series (LNCS, volume 7590)

Abstract

Software safety certification needs to address non-functional constraints with safety implications, e.g., deadlines, throughput, and CPU and memory usage. In this paper, we focus on CPU usage constraints and provide a framework to support the derivation of test cases that maximize the chances of violating CPU usage requirements. We develop a conceptual model specifying the generic abstractions required for analyzing CPU usage and provide a mapping between these abstractions and UML/MARTE. Using this model, we formulate CPU usage analysis as a constraint optimization problem and provide an implementation of our approach in a state-of-the-art optimization tool. We report an application of our approach to a case study from the maritime and energy domain. Through this case study, we argue that our approach (1) can be applied with a practically reasonable overhead in an industrial setting, and (2) is effective for identifying test cases that maximize CPU usage.

Keywords

Schedule Policy Sequence Diagram Schedulability Analysis Temporal Precedence Parallel Thread 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2012

Authors and Affiliations

  • Shiva Nejati
    • 1
  • Stefano Di Alesio
    • 1
    • 2
  • Mehrdad Sabetzadeh
    • 1
  • Lionel Briand
    • 1
    • 2
  1. 1.SnT CenterUniversity of LuxembourgLuxembourg
  2. 2.Simula Research LaboratoryCertus Software V&V CenterNorway

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