CTL: A Platform-Independent Crypto Tools Library Based on Dataflow Programming Paradigm

  • Junaid Jameel Ahmad
  • Shujun Li
  • Ahmad-Reza Sadeghi
  • Thomas Schneider
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 7397)


The diversity of computing platforms is increasing rapidly. In order to allow security applications to run on such diverse platforms, implementing and optimizing the same cryptographic primitives for multiple target platforms and heterogeneous systems can result in high costs. In this paper, we report our efforts in developing and benchmarking a platform-independent Crypto Tools Library (CTL). CTL is based on a dataflow programming framework called Reconfigurable Video Coding (RVC), which was recently standardized by ISO/IEC for building complicated reconfigurable video codecs. CTL benefits from various properties of the RVC framework including tools to 1) simulate the platform-independent designs, 2) automatically generate implementations in different target programming languages (e.g., C/C++, Java, LLVM, and Verilog/VHDL) for deployment on different platforms as software and/or hardware modules, and 3) design space exploitation such as automatic parallelization for multi- and many-core systems. We benchmarked the performance of the SHA-256 implementation in CTL on single-core target platforms and demonstrated that implementations automatically generated from platform-independent RVC applications can achieve a run-time performance comparable to reference implementations manually written in C and Java. For a quad-core target platform, we benchmarked a 4-adic hash tree application based on SHA-256 that achieves a performance gain of up to 300% for hashing messages of size 8 MB.


Crypto Tools Library (CTL) Reconfigurable Video Coding (RVC) dataflow programming reconfigurability platform independence multi-core 


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  1. 1.
    Esterel Synchronous Language,
  2. 2.
  3. 3.
  4. 4.
    Mathworks Simulink: Simulation and Model-Based Design,
  5. 5.
    Open Data Flow (OpenDF),
  6. 6.
    Open RVC-CAL Compiler (ORCC),
  7. 7.
  8. 8.
    Cryptol: The Language of Cryptography. Case Study (2008),
  9. 9.
    CAO and qhasm compiler tools. EU Project CACE deliverable D1.3, Revision 1.1 (2011),
  10. 10.
    Ahmad, J.J., Li, S., Amer, I., Mattavelli, M.: Building multimedia security applications in the MPEG Reconfigurable Video Coding (RVC) framework. In: Proc. 2011 ACM SIGMM Multimedia and Security Workshop, MM&Sec 2011 (2011)Google Scholar
  11. 11.
    Akyildiz, I.F., Melodia, T., Chowdhury, K.R.: Wireless multimedia sensor networks: Applications and testbeds. Proc. IEEE 96(10), 1588–1605 (2008)CrossRefGoogle Scholar
  12. 12.
    Ali, H.I.A.A., Patoary, M.N.I.: Design and Implementation of an Audio Codec (AMR-WB) using Dataflow Programming Language CAL in the OpenDF Environment. TR: IDE1009, Halmstad University, Sweden (2010)Google Scholar
  13. 13.
    Aman-Allah, H., Maarouf, K., Hanna, E., Amer, I., Mattavelli, M.: CAL dataflow components for an MPEG RVC AVC baseline encoder. J. Signal Processing Systems 63(2), 227–239 (2011)CrossRefGoogle Scholar
  14. 14.
    Amer, I., Lucarz, C., Roquier, G., Mattavelli, M., Raulet, M., Nezan, J., Déforges, O.: Reconfigurable Video Coding on multicore: An overview of its main objectives. IEEE Signal Processing Magazine 26(6), 113–123 (2009)CrossRefGoogle Scholar
  15. 15.
    Antola, A., Fracassi, M., Gotti, P., Sandionigi, C., Santambrogio, M.: A novel hardware/software codesign methodology based on dynamic reconfiguration with Impulse C and CoDeveloper. In: Proc. 2007 3rd Southern Conference on Programmable Logic, SPL 2007, pp. 221–224 (2007)Google Scholar
  16. 16.
    Barbosa, M., Noad, R., Page, D., Smart, N.P.: First steps toward a cryptography-aware language and compiler. Cryptology ePrint Archive: Report 2005/160 (2005),
  17. 17.
    Bernstein, D.J., Schwabe, P.: New AES Software Speed Records. In: Chowdhury, D.R., Rijmen, V., Das, A. (eds.) INDOCRYPT 2008. LNCS, vol. 5365, pp. 322–336. Springer, Heidelberg (2008)CrossRefGoogle Scholar
  18. 18.
    Bertoni, G., Breveglieri, L., Fragneto, P., Macchetti, M., Marchesin, S.: Efficient Software Implementation of AES on 32-Bit Platforms. In: Kaliski Jr., B.S., Koç, Ç.K., Paar, C. (eds.) CHES 2002. LNCS, vol. 2523, pp. 159–171. Springer, Heidelberg (2003)CrossRefGoogle Scholar
  19. 19.
    Bhattacharyya, S., Eker, J., Janneck, J.W., Lucarz, C., Mattavelli, M., Raulet, M.: Overview of the MPEG Reconfigurable Video Coding framework. J. Signal Processing Systems 63(2), 251–263 (2011)CrossRefGoogle Scholar
  20. 20.
    Boutellier, J., Gomez, V.M., Silvén, O., Lucarz, C., Mattavelli, M.: Multiprocessor scheduling of dataflow models within the Reconfigurable Video Coding framework. In: Proc. 2009 Conference on Design and Architectures for Signal and Image Processing, DASIP 2009 (2009)Google Scholar
  21. 21.
    Canright, D., Osvik, D.A.: A More Compact AES. In: Jacobson Jr., M.J., Rijmen, V., Safavi-Naini, R. (eds.) SAC 2009. LNCS, vol. 5867, pp. 157–169. Springer, Heidelberg (2009)CrossRefGoogle Scholar
  22. 22.
    Corbet, J.: The high-resolution timer (API) (2006),
  23. 23.
    Cryptico A/S: Rabbit stream cipher, performance evaluation. White Paper, Version 1.4 (2005),
  24. 24.
    Dai, W.: Crypto++ library,
  25. 25.
    Dennis, J.: First Version of a Data Flow Procedure Language. In: Robinet, B. (ed.) Programming Symposium. LNCS, vol. 19, pp. 362–376. Springer, Heidelberg (1974)CrossRefGoogle Scholar
  26. 26.
    Eker, J., Janneck, J.W.: CAL language report: Specification of the CAL actor language. Technical Memo UCB/ERL M03/48, Electronics Research Laboratory, UC Berkeley (2003)Google Scholar
  27. 27.
    Gay, O.: SHA-2: Fast Software Implementation,
  28. 28.
    Grabher, P., Großschädl, J., Page, D.: Light-Weight Instruction Set Extensions for Bit-Sliced Cryptography. In: Oswald, E., Rohatgi, P. (eds.) CHES 2008. LNCS, vol. 5154, pp. 331–345. Springer, Heidelberg (2008)CrossRefGoogle Scholar
  29. 29.
    Gupta, S., Dutt, N., Gupta, R., Nicolau, A.: SPARK: A high-level synthesis framework for applying parallelizing compiler transformations. In: Proc. 2003 16th International Conference on VLSI Design, VLSI Design 2003 (2003)Google Scholar
  30. 30.
  31. 31.
    Ha, S., Kim, S., Lee, C., Yi, Y., Kwon, S., Joo, Y.P.: PeaCE: A hardware-software codesign environment for multimedia embedded systems. ACM Trans. on Design Automation of Electronic Syststems 12(3), Article 24 (2007)Google Scholar
  32. 32.
    Huang, Y., Evans, D., Katz, J., Malka, L.: Faster secure two-party computation using garbled circuits. In: Proc. 20th USENIX Security Symposium (2011)Google Scholar
  33. 33.
    ISO/IEC: Information technology – MPEG video technologies – Part 4: Video tool library. ISO/IEC 23002-4 (2009)Google Scholar
  34. 34.
    ISO/IEC: Information technology - MPEG systems technologies - Part 4: Codec configuration representation. ISO/IEC 23001-4 (2009)Google Scholar
  35. 35.
    Janneck, J., Miller, I., Parlour, D., Roquier, G., Wipliez, M., Raulet, M.: Synthesizing hardware from dataflow programs: An MPEG-4 Simple Profile decoder case study. J. Signal Processing Systems 63(2), 241–249 (2011)CrossRefGoogle Scholar
  36. 36.
    Järvinen, K., Kolesnikov, V., Sadeghi, A.-R., Schneider, T.: Embedded SFE: Offloading Server and Network Using Hardware Tokens. In: Sion, R. (ed.) FC 2010. LNCS, vol. 6052, pp. 207–221. Springer, Heidelberg (2010)CrossRefGoogle Scholar
  37. 37.
    Järvinen, K., Kolesnikov, V., Sadeghi, A.-R., Schneider, T.: Garbled Circuits for Leakage-Resilience: Hardware Implementation and Evaluation of One-Time Programs. In: Mangard, S., Standaert, F.-X. (eds.) CHES 2010. LNCS, vol. 6225, pp. 383–397. Springer, Heidelberg (2010)CrossRefGoogle Scholar
  38. 38.
    Kangas, T., Kukkala, P., Orsila, H., Salminen, E., Hännikäinen, M., Hämäläinen, T.D., Riihimäki, J., Kuusilinna, K.: UML-based multiprocessor SoC design framework. ACM Trans. on Embedded Compututer Systems 5, 281–320 (2006)CrossRefGoogle Scholar
  39. 39.
    Khan, E., El-Kharashi, M.W., Gebali, F., Abd-El-Barr, M.: Applying the Handel-C design flow in designing an HMAC-hash unit on FPGAs. Computers and Digital Techniques 153(5), 323–334 (2006)CrossRefGoogle Scholar
  40. 40.
    Lee, E.A., Messerschmitt, D.G.: Synchronous data flow. Proc. IEEE 75(9), 1235–1245 (1987)CrossRefGoogle Scholar
  41. 41.
    Lewis, J.R., Martin, B.: Cryptol: High assurance, retargetable crypto development and validation. In: Proc. 2003 IEEE Military Communication Conference, MILCOM 2003, pp. 820–825 (2003)Google Scholar
  42. 42.
    Li, S., Sadeghi, A.-R., Heisrath, S., Schmitz, R., Ahmad, J.J.: hPIN/hTAN: A Lightweight and Low-Cost E-Banking Solution against Untrusted Computers. In: Danezis, G. (ed.) FC 2011. LNCS, vol. 7035, pp. 235–249. Springer, Heidelberg (2012)CrossRefGoogle Scholar
  43. 43.
    Lucarz, C., Mattavelli, M., Dubois, J.: A co-design platform for algorithm/architecture design exploration. In: Proc. 2008 IEEE International Conference on Multimedia and Expo., ICME 2008, pp. 1069–1072 (2008)Google Scholar
  44. 44.
    Manley, R., Gregg, D.: A Program Generator for Intel AES-NI Instructions. In: Gong, G., Gupta, K.C. (eds.) INDOCRYPT 2010. LNCS, vol. 6498, pp. 311–327. Springer, Heidelberg (2010)CrossRefGoogle Scholar
  45. 45.
    Matsui, M., Nakajima, J.: On the Power of Bitslice Implementation on Intel Core2 Processor. In: Paillier, P., Verbauwhede, I. (eds.) CHES 2007. LNCS, vol. 4727, pp. 121–134. Springer, Heidelberg (2007)CrossRefGoogle Scholar
  46. 46.
    Moran, T.: The Qilin Crypto SDK: An open-source Java SDK for rapid prototyping of cryptographic protocols,
  47. 47.
    Moss, A., Page, D.: Bridging the gap between symbolic and efficient AES implementations. In: Proc. 2010 ACM SIGPLAN Workshop on Partial Evaluation and Program Manipulation, PEPM 2010, pp. 101–110 (2010)Google Scholar
  48. 48.
    Moving Picture Experts Group (MPEG): Who we are,
  49. 49.
    Nikhil, R.: Tutorial – BlueSpec SystemVerilog: Efficient, correct RTL from high-level specifications. In: Proc. 2nd ACM/IEEE International Conference on Formal Methods and Models for Co-Design, MEMOCODE 2004, pp. 69–70 (2004)Google Scholar
  50. 50.
    NIST: Data Encryption Standard (DES). FIPS PUB 46-3 (1999)Google Scholar
  51. 51.
    NIST: Specification for the Advanced Encryption Standard (AES). FIPS PUB 197 (2001)Google Scholar
  52. 52.
    NIST: Recommendation for the Triple Data Encryption Algorithm (TDEA) block cipher. Special Publication 800-67, Version 1.1 (2008)Google Scholar
  53. 53.
    NIST: Secure Hash Standard (SHS). FIPS PUB 180-3 (2008)Google Scholar
  54. 54.
    Oracle®: JavaTMCryptography Architecture (JCA) Reference Guide.
  55. 55.
    Osvik, D.A., Bos, J.W., Stefan, D., Canright, D.: Fast Software AES Encryption. In: Hong, S., Iwata, T. (eds.) FSE 2010. LNCS, vol. 6147, pp. 75–93. Springer, Heidelberg (2010)CrossRefGoogle Scholar
  56. 56.
    Pornin, T.: sphlib 3.0,
  57. 57.
    PureNoise Ltd Vaduz: PureNoise CryptoLib,
  58. 58.
    Rompaey, K.V., Verkest, D., Bolsens, I., Man, H.D.: CoWare – a design environment for heterogeneous hardware/software systems. Design Automation for Embedded Systems 1(4), 357–386 (1996)Google Scholar
  59. 59.
    Schneier, B.: Description of a New Variable-Length Key, 64-bit Block Cipher (Blowfish). In: Anderson, R. (ed.) FSE 1993. LNCS, vol. 809, pp. 191–204. Springer, Heidelberg (1994)CrossRefGoogle Scholar
  60. 60.
    Schneier, B.: Applied Cryptography: Protocols, algorithms, and source code in C, 2nd edn. John Wiley & Sons, Inc., New York (1996)zbMATHGoogle Scholar
  61. 61.
    Sutherland, W.R.: The On-Line Graphical Specification of Computer Procedures. Ph.D. thesis. MIT (1966)Google Scholar
  62. 62.
    Thavot, R., Mosqueron, R., Dubois, J., Mattavelli, M.: Hardware synthesis of complex standard interfaces using CAL dataflow descriptions. In: Proc. 2009 Conference on Design and Architectures for Signal and Image Processing, DASIP 2009 (2009)Google Scholar
  63. 63.
    The Legion of the Bouncy Castle: Bouncy Castle Crypto APIs,
  64. 64.
    The OpenSSL Project: OpenSSL cryptographic library,
  65. 65.
    Thompson, M., Nikolov, H., Stefanov, T., Pimentel, A.D., Erbas, C., Polstra, S., Deprettere, E.F.: A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs. In: Proc. 5th IEEE/ACM International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2007, pp. 9–14 (2007)Google Scholar
  66. 66.
    Tillich, S., Großschädl, J.: Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors. In: Goubin, L., Matsui, M. (eds.) CHES 2006. LNCS, vol. 4249, pp. 270–284. Springer, Heidelberg (2006)CrossRefGoogle Scholar
  67. 67.
    Tillich, S., Herbst, C.: Boosting AES Performance on a Tiny Processor Core. In: Malkin, T. (ed.) CT-RSA 2008. LNCS, vol. 4964, pp. 170–186. Springer, Heidelberg (2008)CrossRefGoogle Scholar
  68. 68.
    Yao, A.C.: How to generate and exchange secrets. In: Proc. 27th Annual Symposium on Foundations of Computer Science, FOCS 1986, pp. 162–167 (1986)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2012

Authors and Affiliations

  • Junaid Jameel Ahmad
    • 1
  • Shujun Li
    • 1
    • 2
  • Ahmad-Reza Sadeghi
    • 3
    • 4
  • Thomas Schneider
    • 3
  1. 1.University of KonstanzGermany
  2. 2.University of SurreyUK
  3. 3.TU DarmstadtGermany
  4. 4.Fraunhofer SITGermany

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