Optimizing the Robustness of Software against Communication Latencies in Distributed Reactive Embedded Systems

  • Vlad Popa
  • Wolfgang Schwitzer
Part of the Lecture Notes in Computer Science book series (LNCS, volume 7437)

Abstract

This paper presents a formal approach of designing software robust against communication latencies that typically occur in distributed embedded systems. In this approach, the software’s data-flow is retimed and scheduled in order to achieve the maximum robustness against possible communication latencies. This robustness is derived individually for a given software and its distribution on a platform’s communication topology. Robustness is interpreted as the guaranteed amount of time, up to which the system does not change its externally observable behavior due to communication latencies. The software’s data-flow is given as a data-flow graph with nodes representing tasks and edges representing communication channels. A linear problem approach is employed that transforms elements of data-flow into variables of linear expressions. An implementation of the approach in the tool Cadmos together with the application on a case example from the automotive software engineering domain shows its practicability.

Keywords

Distributed Systems Embedded Systems Reactive Systems Data-Flow Retiming Linear Problem Scheduling Communication Latency Robustness 

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Harel, D., Pnueli, A.: On the development of reactive systems, pp. 477–498. Springer-Verlag New York, Inc., New York (1985) Google Scholar
  2. 2.
    Davis, A., Keller, R.: Data flow program graphs. Computer 15(2), 26–41 (1982)CrossRefGoogle Scholar
  3. 3.
    Lee, E., Messerschmitt, D.: Synchronous data flow. Proceedings of the IEEE 75(9), 1235–1245 (1987)CrossRefGoogle Scholar
  4. 4.
    Parhi, K.: Algorithm transformation techniques for concurrent processors. Proceedings of the IEEE 77(12), 1879–1895 (1989)CrossRefGoogle Scholar
  5. 5.
    Sriram, S., Bhattacharyya, S.S.: Embedded Multiprocessors: Scheduling and Synchronization, 1st edn. Marcel Dekker, Inc., New York (2000)Google Scholar
  6. 6.
    Brock, J., Ackerman, W.: Scenarios: A model of non-determinate computation. In: Díaz, J., Ramos, I. (eds.) Formalization of Programming Concepts. LNCS, vol. 107, pp. 252–259. Springer, Heidelberg (1981)CrossRefGoogle Scholar
  7. 7.
    Leiserson, C., Rose, F., Saxe, J.: Optimizing synchronous circuitry by retiming. In: Third Caltech Conference on Very Large Scale Integration, pp. 87–116. Computer Science Press, Incorporated (1983)Google Scholar
  8. 8.
    Leiserson, C., Saxe, J.: Retiming synchronous circuitry. Algorithmica 6(1), 5–35 (1991)MathSciNetMATHCrossRefGoogle Scholar
  9. 9.
    Chao, L.F., Sha, E.H.M.: Scheduling data-flow graphs via retiming and unfolding. IEEE Trans. Parallel Distrib. Syst. 8, 1259–1267 (1997)CrossRefGoogle Scholar
  10. 10.
    Broy, M.: Relating time and causality in interactive distributed systems. European Review 18(04), 507–563 (2010)CrossRefGoogle Scholar
  11. 11.
    Schwitzer, W., Popa, V., Chessa, D., Weissenberger, F.: Cadmos - A concurrent architectures toolkit (2012), http://code.google.com/p/cadmos/ (accessed April 03, 2012)
  12. 12.
    LP_Solve Developers: LP_Solve Website (2012), http://lpsolve.sourceforge.net/ (accessed April 03, 2012)
  13. 13.
    Feilkas, M., Fleischmann, A., Hölzl, F., Pfaller, C., Scheidemann, K., Spichkova, M., Trachtenherz, D.: A Top-Down Methodology for the Development of Automotive Software. Technical report, Technische Universität München (2009)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2012

Authors and Affiliations

  • Vlad Popa
    • 1
  • Wolfgang Schwitzer
    • 1
  1. 1.Institut für InformatikTechnische Universität MünchenGarchingGermany

Personalised recommendations