Teaching Hardware/Software Codesign on a Reconfigurable Computing Platform

  • Markus Weinhardt
Part of the Lecture Notes in Computer Science book series (LNCS, volume 7199)

Abstract

This paper reports on a practically oriented undergraduate course in Hardware/Software Codesign which uses an FPGA-based reconfigurable computing platform with a soft processor for analyzing and evaluating hardware/software trade-offs. The Altium Designer design flow was chosen for the practical lab exercises because it smoothly integrates HDL-based FPGA design with Embedded Programming. Furthermore, a “C to hardware” compiler allows to quickly migrate functionality from software to hardware. A complete hardware/software system was emulated on the Altium NanoBoard 3000XN. The board was also used for group projects ranging from image processing to digital audio and video processing.

Keywords

teaching lecture hardware/software codesign soft processor FPGA Altium Designer NanoBoard 

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Altium Limited. Getting Started with the Altium Designer, http://www.altium.com
  2. 2.
    Altium Limited. Altium NanoBoard 3000 Series Data Sheet (2009), http://www.altium.com
  3. 3.
    Teich, J., Haubelt, C.: Digitale Hardware/Software-Systeme - Synthese und Optimierung, 2nd edn. Springer, Heidelberg (2007) (in German)MATHGoogle Scholar
  4. 4.
    Schaumont, P.R.: A Practical Introduction to Hardware/Software Codesign. Springer, Heidelberg (2010)CrossRefMATHGoogle Scholar
  5. 5.
    Schaumont, P.: A senior-level course in hardware-software codesign. IEEE Transactions on Education 51(3) (August 2008)Google Scholar
  6. 6.
    Plessl, C.: Hardware/Software Codesign. Paderborn Center for Parallel Computing - Universität Paderborn. Lecture Notes (2010) (in German)Google Scholar
  7. 7.
    Vahid, F., Givargis, T.: Embedded System Design - A Unified Hardware/Software Introduction. John Wiley & Sons (2002)Google Scholar
  8. 8.
    Wishbone B4 - WISHBONE System-on-Chip (SoC) Interconnection Architecture for Portable IP Cores (2010), http://www.opencores.org
  9. 9.
    Bobda, C.: Introduction to Reconfigurable Computing. Springer, Heidelberg (2010)MATHGoogle Scholar
  10. 10.
    Vassiliadis, S., Soudris, D. (eds.): Fine and Coarse-Grain Reconfigurable Computing. Springer, Heidelberg (2007)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2012

Authors and Affiliations

  • Markus Weinhardt
    • 1
  1. 1.Osnabrück University of Applied SciencesOsnabrückGermany

Personalised recommendations