Soundness of Data Flow Analyses for Weak Memory Models

  • Jade Alglave
  • Daniel Kroening
  • John Lugton
  • Vincent Nimal
  • Michael Tautschnig
Part of the Lecture Notes in Computer Science book series (LNCS, volume 7078)

Abstract

Modern multi-core microprocessors implement weak memory consistency models; programming for these architectures is a challenge. This paper solves a problem open for ten years, and originally posed by Rinard: we identify sufficient conditions for a data flow analysis to be sound w.r.t. weak memory models. We first identify a class of analyses that are sound, and provide a formal proof of soundness at the level of trace semantics. Then we discuss how analyses unsound with respect to weak memory models can be repaired via a fixed point iteration, and provide experimental data on the runtime overhead of this method.

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References

  1. 1.
    Lamport, L.: How to Make a Correct Multiprocess Program Execute Correctly on a Multiprocessor. IEEE Trans. Comput. 46(7), 779–782 (1979)MathSciNetCrossRefGoogle Scholar
  2. 2.
    Intel: Intel 64 and IA-32 Architectures Software Developer’s Manual, vol. 3A, rev. 30. (March 2009), intel.com/products/processor/manuals
  3. 3.
    IBM: Power ISA Version 2.06B (July 2010), power.org/resources/downloads/PowerISA_V2.06B_V2_PUBLIC.pdf
  4. 4.
    Alglave, J., Maranget, L., Sarkar, S., Sewell, P.: Fences in Weak Memory Models. In: Touili, T., Cook, B., Jackson, P. (eds.) CAV 2010. LNCS, vol. 6174, pp. 258–272. Springer, Heidelberg (2010)CrossRefGoogle Scholar
  5. 5.
    Alglave, J., Maranget, L., Sarkar, S., Sewell, P.: Litmus: Running Tests Against Hardware. In: Abdulla, P.A., Leino, K.R.M. (eds.) TACAS 2011. LNCS, vol. 6605, pp. 41–44. Springer, Heidelberg (2011)CrossRefGoogle Scholar
  6. 6.
    Manson, J., Pugh, W., Adve, S.V.: The Java Memory Model. In: POPL (2005)Google Scholar
  7. 7.
    Boehm, H.J., Adve, S.V.: Foundations of the C++ concurrency memory model. In: PLDI (2008)Google Scholar
  8. 8.
    Adve, S.V., Hill, M.D.: Weak ordering – A new definition. In: ISCA (1990)Google Scholar
  9. 9.
    Burckhardt, S., Alur, R., Martin, M.K.: Checkfence: Checking consistency of concurrent data types on relaxed memory models. In: PLDI (2007)Google Scholar
  10. 10.
    Alglave, J., Maranget, L.: Stability in Weak Memory Models. In: Gopalakrishnan, G., Qadeer, S. (eds.) CAV 2011. LNCS, vol. 6806, pp. 50–66. Springer, Heidelberg (2011)CrossRefGoogle Scholar
  11. 11.
    Rinard, M.: Analysis of Multithreaded Programs. In: Cousot, P. (ed.) SAS 2001. LNCS, vol. 2126, pp. 1–19. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  12. 12.
    Cousot, P., Cousot, R.: Static determination of dynamic properties of programs. In: International Symposium on Programming, Dunod (1976)Google Scholar
  13. 13.
    Miné, A.: The octagon abstract domain. In: Workshop on Analysis, Slicing, and Transformation (AST). IEEE (2001)Google Scholar
  14. 14.
    Jeannet, B.: Relational interprocedural verification of concurrent programs. In: SEFM. IEEE (2009)Google Scholar
  15. 15.
    Ferrara, P.: Static Analysis Via Abstract Interpretation of the Happens-before Memory Model. In: Beckert, B., Hähnle, R. (eds.) TAP 2008. LNCS, vol. 4966, pp. 116–133. Springer, Heidelberg (2008)CrossRefGoogle Scholar
  16. 16.
    Miné, A.: Static Analysis of Run-Time Errors in Embedded Critical Parallel C Programs. In: Barthe, G. (ed.) ESOP 2011. LNCS, vol. 6602, pp. 398–418. Springer, Heidelberg (2011)CrossRefGoogle Scholar
  17. 17.
    Alglave, J.: A Shared Memory Poetics. PhD thesis, Université Paris 7 and INRIA (2010), http://moscova.inria.fr/~alglave/these
  18. 18.
    Sevcik, J., Vafeiadis, V., Zappa Nardelli, F., Jagannathan, S., Sewell, P.: Relaxed-memory concurrency and verified compilation. In: POPL (2011)Google Scholar
  19. 19.
    Vafeiadis, V., Zappa Nardelli, F.: Verifying Fence Elimination Optimisations. In: Yahav, E. (ed.) Static Analysis. LNCS, vol. 6887, pp. 146–162. Springer, Heidelberg (2011)CrossRefGoogle Scholar
  20. 20.
    Sewell, P., Sarkar, S., Owens, S., Zappa Nardelli, F., Myreen, M.: x86-TSO: a Rigorous and Usable Programmer’s Model for x86 Multiprocessors. In: CACM (2010)Google Scholar
  21. 21.
    SPARC: SPARC Architecture Manual Versions 8 and 9 (1992 and 1994), sparc.org/standards/V8.pdf, sparc.org/standards/SPARCV9.pdf
  22. 22.
    Nielson, F., Nielson, H.R., Hankin, C.: Principles of Program Analysis. Springer-Verlag New York, Inc., Secaucus (1999)CrossRefMATHGoogle Scholar
  23. 23.
    Compaq: Alpha Architecture Reference Manual, 4 edn. (2002), download.majix.org/dec/alpha_arch_ref.pdf
  24. 24.
    Rugina, R., Rinard, M.C.: Pointer analysis for multithreaded programs. In: PLDI (1999)Google Scholar
  25. 25.
    Farzan, A., Kincaid, Z.: Compositional Bitvector Analysis for Concurrent Programs with Nested Locks. In: Cousot, R., Martel, M. (eds.) SAS 2010. LNCS, vol. 6337, pp. 253–270. Springer, Heidelberg (2010)CrossRefGoogle Scholar
  26. 26.
    Wang, C., Limaye, R., Ganai, M., Gupta, A.: Trace-Based Symbolic Analysis for Atomicity Violations. In: Esparza, J., Majumdar, R. (eds.) TACAS 2010. LNCS, vol. 6015, pp. 328–342. Springer, Heidelberg (2010)CrossRefGoogle Scholar
  27. 27.
    Wang, C., Kundu, S., Ganai, M., Gupta, A.: Symbolic Predictive Analysis for Concurrent Programs. In: Cavalcanti, A., Dams, D.R. (eds.) FM 2009. LNCS, vol. 5850, pp. 256–272. Springer, Heidelberg (2009)CrossRefGoogle Scholar
  28. 28.
    Witkowski, T., Blanc, N., Kroening, D., Weissenbacher, G.: Model checking concurrent Linux device drivers. In: ASE. ACM (2007)Google Scholar
  29. 29.
    Adve, S.V., Gharachorloo, K.: Shared Memory Consistency Models: A Tutorial. IEEE Computer 29, 66–76 (1995)CrossRefGoogle Scholar
  30. 30.
    Adve, S., Boehm, H.J.: Memory Models: A Case for Rethinking Parallel Languages and Hardware. To appear in CACMGoogle Scholar
  31. 31.
    Owens, S., Sarkar, S., Sewell, P.: A Better x86 Memory Model: x86-TSO. In: Berghofer, S., Nipkow, T., Urban, C., Wenzel, M. (eds.) TPHOLs 2009. LNCS, vol. 5674, pp. 391–407. Springer, Heidelberg (2009)CrossRefGoogle Scholar
  32. 32.
    Callahan, D., Cooper, K.D., Kennedy, K., Torczon, L.: Interprocedural constant propagation. In: SIGPLAN Symposium on Compiler Construction (1986)Google Scholar
  33. 33.
    Knoop, J., Steffen, B., Vollmer, J.: Parallelism for free: Efficient and optimal bitvector analyses for parallel programs. ACM Trans. Program. Lang. Syst. 18(3), 268–299 (1996)CrossRefGoogle Scholar
  34. 34.
    Chugh, R., Voung, J.W., Jhala, R., Lerner, S.: Dataflow analysis for concurrent programs using datarace detection. In: Programming Language Design and Implementation (PLDI), pp. 316–326. ACM (2008)Google Scholar
  35. 35.
    Steensgaard, B.: Points-to analysis in almost linear time. In: POPL (1996)Google Scholar
  36. 36.
    Khedker, U.P., Dhamdhere, D.M.: A generalized theory of bit vector data flow analysis. ACM Trans. Program. Lang. Syst. 16(5), 1472–1511 (1994)CrossRefGoogle Scholar
  37. 37.
    Cousot, P., Halbwachs, N.: Automatic discovery of linear restraints among variables of a program. In: POPL (1978)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2011

Authors and Affiliations

  • Jade Alglave
    • 1
  • Daniel Kroening
    • 1
  • John Lugton
    • 1
  • Vincent Nimal
    • 1
  • Michael Tautschnig
    • 1
  1. 1.Department of Computer ScienceUniversity of OxfordUK

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