Advertisement

Implementation of a Large Data Processing Method for Embedded System and CMOS SNR Application

  • Chien-Hung Chen
  • Tai-Shan Liao
  • Chi-Hung Hwang
Part of the Communications in Computer and Information Science book series (CCIS, volume 223)

Abstract

The embedded system is the future trends of instrument and the larger memory capacity of embedded system is favor to different variety of applications. The commercial embedded systems are always restricted by their embedded memory capacity and required to be upgraded, especially in image application. This article reports a new design and development of an embedded system built in a CMOS image SNR measurement instrument. The new developed approach using the mix technique of large data processing (MLDP) method for CMOS SNR calculation is described. The MLDP method uses an external memory device as auxiliary memory in the regular embedded system to break the memory capacity limitation. The experimental results show the new method is applied successfully in CMOS SNR measurement and the calculated speed is increased almost 200 times compared to that of the traditional method even thought the processing data size is over the embedded system memory.

Keywords

Large data processing Embedded system External memory CMOS SNR 

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Cheng, A.M.K., Wang, Y.: A dynamic voltage scaling algorithm for dynamic workloads. Journal of Signal Processing Systems 52, 45–57 (2007)CrossRefGoogle Scholar
  2. 2.
    Smith, M., Miller, J., Daeninck, S.: A test-oriented embedded system production methodology. Journal of Signal Processing Systems 56, 69–89 (2009)CrossRefGoogle Scholar
  3. 3.
    Talavera, G., Jayapala, M., Carrabina, J., Catthoor, F.: Address generation optimization for embedded high-performance processors: a survey. Journal of Signal Processing Systems 53, 271–284 (2008)CrossRefGoogle Scholar
  4. 4.
    Pardo, F., Dierickx, B., Scheffer, D.: Space-variant non-orthogonal structure CMOS image sensor design. IEEE Journal of Solid State Circuits 33, 842–849 (1998)CrossRefGoogle Scholar
  5. 5.
    Fossum, E.R.: CMOS image sensors: electronic camera on a chip. IEEE Transactions on Electron Devices 44, 1689–1698 (1997)CrossRefGoogle Scholar
  6. 6.
    Correia, J.H., de Graaf, G., Kong, S.H., Bartek, M., Wolffenbuttel, R.F.: Single-chip CMOS optical microspectrometer. Sensor and Actuators A 82, 191–197 (2000)CrossRefGoogle Scholar
  7. 7.
    Mühlmann, U., Ribo, M., Lang, P., Pinz, A.: A new high speed CMOS camera for real-time tracking applications. In: ICRA 2004 (New Orleans), pp. 5195–5200 (2004)Google Scholar
  8. 8.
    Schwarz, M., Ewe, L., Hauschild, R., Hosticka, B.J., Huppertz, J., Kolnsberg, S., Mokwa, W., Trieu, H.K.: Single Chip CMOS Imagers and Flexible Microelectronic Stimulators for a Retina Implant System. Sensor and Actuators A 83, 40–46 (2000)CrossRefGoogle Scholar
  9. 9.
    Panda, P.R., Catthoor, F., Dutt, N.D., Danckaert, K., Brockmeyer, E., Kulkarni, C., Vandercappelle, A., Kjeldsberg, P.G.: Data and memory optimization techniques for embedded systems. ACM Trans. on Design Auto. of Electronic Systems 6, 149–206 (2001)CrossRefGoogle Scholar
  10. 10.
    Catthoor, F., Wuytack, S., DeE Greef, E., Balasa, F., Nnachtergaele, L., Vandecappelle, A.: Custom Memory Management Methodology. In: Exploration of Memory Organization for Embedded Multimedia System Design. Kluwer Academic, Dordrecht (1998)Google Scholar
  11. 11.
    Byrd, R.H., Lu, P., Nocedal, J.: A limited memory algorithm for bound constrained optimization. SIAM Journal on Scientific and Statistical Computing 16, 1190–1208 (1995)MathSciNetCrossRefzbMATHGoogle Scholar
  12. 12.
    Schurgers, C., Catthoor, F., Engels, M.: Memory Optimisation of MAP Turbo Decoder Algorithms. IEEE Transaction on VLSI Systems 9, 305–312 (2001)CrossRefGoogle Scholar
  13. 13.
    Golub, G., Van Loan, C.F.: Matrix Computations. Johns Hopkins University Press, Baltimore (1989)zbMATHGoogle Scholar
  14. 14.
    Wolfe, M.: More iteration space tiling. In: ACM/IEEE Conference on Supercomputing, pp. 655–664 (1989)Google Scholar
  15. 15.
    Aspey, R.A., McDermid, I.S., Leblanc, T., Howe, J.W., Walsh, T.D.: LABVIEW graphical user interface for precision multichannel alignment of Raman lidar at Jet Propulsion Laboratory, Table Mountain Facility. Review of Scientific Instruments 79, 094502 (2008)CrossRefGoogle Scholar
  16. 16.
    Blacksell, M., Wach, J., Anderson, D., Howard, J., Collis, S.M., Blackwell, B.D., Andruczyk, D., James, B.W.: Imaging photomultiplier array with integrated amplifiers and high-speed USB interface. Review of Scientific Instruments 79, 10F506 (2008)CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2011

Authors and Affiliations

  • Chien-Hung Chen
    • 1
  • Tai-Shan Liao
    • 1
  • Chi-Hung Hwang
    • 1
  1. 1.Instrument Technology Research CenterNational Applied Research LaboratoriesHsinchuTaiwan

Personalised recommendations