Automated reasoning tasks in many real-world domains involve analysis of redundancies in unsatisfiable instances of SAT. In CNF-based instances, some of the redundancies can be captured by computing a minimally unsatisfiable subset of clauses (MUS). However, the notion of MUS does not apply directly to non-clausal instances of SAT, particularly those that are represented as Boolean circuits. In this paper we identify certain types of redundancies in unsatisfiable Boolean circuits, and propose a number of algorithms to compute minimally unsatisfiable, that is, irredundant, subcircuits.


Propositional Formula Satisfying Assignment Boolean Circuit Input Gate Output Gate 
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© Springer-Verlag Berlin Heidelberg 2011

Authors and Affiliations

  • Anton Belov
    • 1
  • Joao Marques-Silva
    • 1
  1. 1.Complex and Adaptive Systems Laboratory School of Computer Science and InformaticsUniversity College DublinIreland

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