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A Tool for Implementing and Evaluating Image Processing Algorithms inside FPGA Circuits

  • E. Guzmán
  • I. García
  • M. Mendoza
Part of the Advances in Intelligent and Soft Computing book series (AINSC, volume 95)

Abstract

This paper aims to show the design and implementation of an integral environment for developing algorithms for digital images processing and analysis on reconfigurable logic. Our tool was divided in four modules. The first module designs a specific application architecture using a hardware description language. Another module uses the designed architecture for designing a hardware system using the SPIES development method. A third module develops a GUI to interact with the embedded system and show the obtained results for processing images with an algorithm inside a FPGA. A last module enables the user to implement and integrate images processing/analysis algorithms through the developed tool.We believe that our tool can be used for academic and research interests with a high level of success.

Keywords

Graphical User Interface Discrete Wavelet Transform Embed System Field Programmable Gate Array Digital Image Processing 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. 1.
    Acharya, T., Ray, A.K.: Image Processing: Principles and Applications. John Wiley and Sons, USA (2005)Google Scholar
  2. 2.
    Bai, Y.W., Tsai, F.E.: Design and Implementation of a Table-based GUI for MP3 players. IEEE Transactions on Consumer Electronics 53(2), 554–560 (2007)CrossRefGoogle Scholar
  3. 3.
    Baobre, L., Losada, R., Alvarez, J.: Sistema de Gestin de Aplicaciones Implementadas en FPGAs. Presented in: III Jornadas sobre Computacin Reconfigurable y Aplicaciones (2003) (in Spanish)Google Scholar
  4. 4.
    Benkrid, K., Crookes, D., Bouridane, A., Corr, P., Alotaibi, K.A.: A High Level Software Environment for FPGA Based Image Processing. In: Seventh International Conference on Image Processing and its Applications, pp. 112–116 (2002)Google Scholar
  5. 5.
    Birla, M.K.: FPGA Based Reconfigurable Platform for Complex Image Processing. In: IEEE International Conference on Electro/information Technology, vol. EIT 2006, pp. 204–209 (2006)Google Scholar
  6. 6.
    Cuenca, S.: IPXS v. 2.2 User Guide. Information Technology and Computation Department. University of Alicante, Spain (2000)Google Scholar
  7. 7.
    El Medany, W.M.: Remote Laboratory for Hardware E-Learning Courses. In: International Conference on Computational Technologies in Electrical and Electronics Engineering, SIBIRCON 2008, pp. 106–109 (2008)Google Scholar
  8. 8.
    Garcia, I., Pacheco, C., Herrera, A.: Defining a Software Process Improvement-based Methodology for Embedded Systems Development. In: Electronics, Robotics and Automotive Mechanics Conference, CERMA 2010, pp. 120–125 (2010)Google Scholar
  9. 9.
    Gonzalez, R.C., Woods, R.E.: Digital Image Processing, 2nd edn. Prentice Hall, Englewood Cliffs (2002)Google Scholar
  10. 10.
    Humphrey, W.: Introduction to Team Software Process. Addison-Wesley, Reading (2000)Google Scholar
  11. 11.
    Li, J., He, H., Man, H., Desai, S.A.: General-Purpose FPGA-Based Reconfigurable Platform for Video and Image Processing. In: Yu, W., He, H., Zhang, N. (eds.) ISNN 2009. LNCS, vol. 5553, pp. 299–309. Springer, Heidelberg (2009)CrossRefGoogle Scholar
  12. 12.
    Ramirez, A., Gadea, R., Colom, R., Daz, J.: A Mixed Hardware/Software SOFM Training System. Revista Computacin y Sistemas 11(4), 349–356 (2008) (in Spanish)Google Scholar
  13. 13.
    Software Engineering Institute. CMMI for Development (CMMI-DEV, V1.2). CMU/SEI-2006 TR-008, Software Engineering Institute, Carnegie Mellon University (2006)Google Scholar
  14. 14.
    Tatas, K., Siozios, K., Vasiliadis, N., Soudris, D.J., Nikolaidis, S., Siskos, S., Thanailakis, A.: FPGA Architecture Design and Toolset for Logic Implementation. In: Chico, J.J., Macii, E. (eds.) PATMOS 2003. LNCS, vol. 2799, pp. 607–616. Springer, Heidelberg (2003)CrossRefGoogle Scholar
  15. 15.
    Yang, L., Choi, Y., Seo, C., Yang, T., Kim, M.: Design of VY: A Mini Visual IDE for the Development of GUI in Embedded Devices. In: International Conference on Software Engineering Research, Management and Applications, SERA 2007, pp. 625–632 (2007)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2011

Authors and Affiliations

  • E. Guzmán
    • 1
  • I. García
    • 1
  • M. Mendoza
    • 1
  1. 1.Universidad Tecnológica de la MixtecaHuajuapan de LeónMéxico

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