High Radix Montgomery Multipliers for Residue Arithmetic Channels on FPGAs

  • Yinan Kong
Conference paper
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 86)


This work targets an efficient Montgomery Modular Multiplier for use in the channels of a Residue Number System (RNS). It is implemented on FPGA and optimized by attempting and evaluating the high radix techniques of the Montgomery Algorithm. The usual correction shift step at the end is proved to be infeasible. The resulting multiplier achieves 15ns for a modular multiplication using high radix without correction shift.


Montgomery Modular Multiplication the Residue Number System FPGA Digital Arithmetic Public-Key Cryptosystems 


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Copyright information

© Springer-Verlag Berlin Heidelberg 2011

Authors and Affiliations

  • Yinan Kong
    • 1
  1. 1.Department of Electronic EngineeringMacquarie UniversityNorth RydeAustralia

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