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UPPAAL in Practice: Quantitative Verification of a RapidIO Network

  • Jiansheng Xing
  • Bart D. Theelen
  • Rom Langerak
  • Jaco van de Pol
  • Jan Tretmans
  • J. P. M. Voeten
Part of the Lecture Notes in Computer Science book series (LNCS, volume 6416)

Abstract

Packet switched networks are widely used for interconnecting distributed computing platforms. RapidIO (Rapid Input/Output) is an industry standard for packet switched networks to interconnect multiple processor boards. Key performance metrics for these platforms include average-case and worst-case packet transfer latencies. We focus on verifying such quantitative properties for a RapidIO based multi-processor platform that executes a motion control application. A performance model is available in the Parallel Object-Oriented Specification Language (POOSL) that allows for simulation based estimation results. It is however required to determine the exact worst-case latency as the application is time-critical. A model checking approach has been proposed in our previous work which transforms the POOSL model into an UPPAAL model. However, such an approach only works for a fairly small system. We extend the transformation approach with various heuristics to reduce the underlying state space, thereby providing an effective approximation approach that scales to industrial problems of a reasonable complexity.

Keywords

UPPAAL POOSL transformation quantitative verification heuristic 

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Copyright information

© Springer-Verlag Berlin Heidelberg 2010

Authors and Affiliations

  • Jiansheng Xing
    • 1
    • 2
  • Bart D. Theelen
    • 2
  • Rom Langerak
    • 1
  • Jaco van de Pol
    • 1
  • Jan Tretmans
    • 2
  • J. P. M. Voeten
    • 2
    • 3
  1. 1.Faculty of EEMCS, Formal Methods and ToolsUniversity of TwenteEnschedeThe Netherlands
  2. 2.Embedded Systems InstituteEindhovenThe Netherlands
  3. 3.Faculty of Electrical Engineering Information and Communication Systems groupEindhoven University of TechnologyEindhovenThe Netherlands

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