WRLA 2010: Rewriting Logic and Its Applications pp 208-225 | Cite as
The Linear Temporal Logic of Rewriting Maude Model Checker
Abstract
This paper presents the foundation, design, and implementation of the Linear Temporal Logic of Rewriting model checker as an extension of the Maude system. The Linear Temporal Logic of Rewriting (LTLR) extends linear temporal logic with spatial action patterns which represent rewriting events. LTLR generalizes and extends various state-based and event-based logics and aims to avoid certain types of mismatches between a system and its temporal logic properties. We have implemented the LTLR model checker at the C++ level within the Maude system by extending the existing Maude LTL model checker. Our LTLR model checker provides very expressive methods to define event-related properties as well as state-related properties, or, more generally, properties involving both events and state predicates. This greater expressiveness is gained without compromising performance, because the LTLR implementation minimizes the extra costs involved in handling the events of systems.
Keywords
Model checking Rewriting Logic Maude AutomataPreview
Unable to display preview. Download preview PDF.
References
- 1.Abdulla, P., Annichini, A., Bouajjani, A.: Symbolic verification of lossy channel systems: Application to the bounded retransmission protocol. In: Cleaveland, W.R. (ed.) TACAS 1999. LNCS, vol. 1579, pp. 208–222. Springer, Heidelberg (1999)CrossRefGoogle Scholar
- 2.Bae, K., Meseguer, J.: A rewriting-based model checker for the temporal logic of rewriting. In: Proc. 9th Inte. Workshop on Rule-Based Programming. ENTCS, Elsevier, Amsterdam (2008)Google Scholar
- 3.Baier, C., Katoen, J.P.: Principles of Model Checking. The MIT Press, Cambridge (2007)MATHGoogle Scholar
- 4.ter Beek, M.H., Fantechi, A., Gnesi, S., Mazzanti, F.: An action/state-based model-checking approach for the analysis of communication protocols for service-oriented applications. In: Leue, S., Merino, P. (eds.) FMICS 2007. LNCS, vol. 4916, pp. 133–148. Springer, Heidelberg (2008)CrossRefGoogle Scholar
- 5.Chaki, S., Clarke, E., Grumberg, O., Ouaknine, J., Sharygina, N., Touili, T., Veith, H.: State/event software verification for branching-time specifications. In: Romijn, J.M.T., Smith, G.P., van de Pol, J. (eds.) IFM 2005. LNCS, vol. 3771, pp. 53–69. Springer, Heidelberg (2005)CrossRefGoogle Scholar
- 6.Chaki, S., Clarke, E., Ouaknine, J., Sharygina, N., Sinha, N.: State/event-based software model checking. In: Boiten, E.A., Derrick, J., Smith, G.P. (eds.) IFM 2004. LNCS, vol. 2999, pp. 128–147. Springer, Heidelberg (2004)CrossRefGoogle Scholar
- 7.Chaki, S., Clarke, E., Ouaknine, J., Sharygina, N., Sinha, N.: Concurrent software verification with states, events, and deadlocks. Formal Aspects of Computing 17, 461–483 (2005)CrossRefMATHGoogle Scholar
- 8.Chandy, K.M., Misra, J.: Parallel Program Design: a Foundation. Addison-Wesley, Reading (1988)MATHGoogle Scholar
- 9.Clarke, E.M., Grumberg, O., Peled, D.A.: Model Checking. The MIT Press, Cambridge (2001)CrossRefGoogle Scholar
- 10.Clavel, M., Durán, F., Eker, S., Meseguer, J., Lincoln, P., Martí-Oliet, N., Talcott, C.: All About Maude - A High-Performance Logical Framework. LNCS, vol. 4350. Springer, Heidelberg (2007)MATHGoogle Scholar
- 11.Dershowitz, N., Jouannaud, J.P.: Rewrite systems. In: van Leeuwen, J. (ed.) Handbook of Theoretical Computer Science, vol. B, pp. 243–320. North-Holland, Amsterdam (1990)Google Scholar
- 12.Durán, F., Meseguer, J.: Maude’s module algebra. Science of Computer Programming 66, 125–153 (2007)MathSciNetCrossRefMATHGoogle Scholar
- 13.Eker, S., Meseguer, J., Sridharanarayanan, A.: The Maude LTL model checker. In: Gadducci, F., Montanari, U. (eds.) Proc. 4th. Intl. Workshop on Rewriting Logic and its Applications. ENTCS. Elsevier, Amsterdam (2002)Google Scholar
- 14.Eker, S., Meseguer, J., Sridharanarayanan, A.: The Maude LTL model checker and its implementation. In: Ball, T., Rajamani, S.K. (eds.) SPIN 2003. LNCS, vol. 2648, pp. 230–234. Springer, Heidelberg (2003)CrossRefGoogle Scholar
- 15.Fantechi, A., Gnesi, S., Lapadula, A., Mazzanti, F., Pugliese, R., Tiezzi, F.: A model checking approach for verifying cows specifications. In: Fiadeiro, J.L., Inverardi, P. (eds.) FASE 2008. LNCS, vol. 4961, pp. 230–245. Springer, Heidelberg (2008)CrossRefGoogle Scholar
- 16.Fiadeiro, J., Martí-Oliet, N., Maibaum, T., Meseguer, J., Pita, I.: Towards a verification logic for rewriting logic. In: Bert, D., Choppy, C., Mosses, P.D. (eds.) WADT 1999. LNCS, vol. 1827, pp. 438–458. Springer, Heidelberg (2000)CrossRefGoogle Scholar
- 17.Gastin, P., Oddoux, D.: Fast ltl to büchi automata translation. In: Berry, G., Comon, H., Finkel, A. (eds.) CAV 2001. LNCS, vol. 2102, pp. 53–65. Springer, Heidelberg (2001)CrossRefGoogle Scholar
- 18.Gnesi, S., Mazzanti, F.: A model checking verification environment for uml statecharts. In: Proceedings XLIII AICA Annual Conference, University of Udine - AICA (2005), http://fmt.isti.cnr.it/WEBPAPER/gmaica2005.pdf
- 19.Hennessy, M., Milner, R.: Algebraic laws for nondeterminism and concurrency. Journal of the Association for Computing Machinery 32(1), 137–172 (1985)MathSciNetCrossRefMATHGoogle Scholar
- 20.Holzmann, G., Peled, D., Yannakakis, M.: On nested depth first search (extended abstract). In: The Spin Verification System, pp. 23–32. American Mathematical Society, Providence (1996)Google Scholar
- 21.Huth, M., Jagadeesan, R., Schmidt, D.: Modal transition systems: A foundation for three-valued program analysis. In: Sands, D. (ed.) ESOP 2001. LNCS, vol. 2028, pp. 155–169. Springer, Heidelberg (2001)CrossRefGoogle Scholar
- 22.Kindler, E., Vesper, T.: ESTL: A temporal logic for events and states. In: Desel, J., Silva, M. (eds.) ICATPN 1998. LNCS, vol. 1420, pp. 365–384. Springer, Heidelberg (1998)CrossRefGoogle Scholar
- 23.Kozen, D.: Results on the propositional mu-calculus. Theoretical Computer Science 27, 333–354 (1983)MathSciNetCrossRefMATHGoogle Scholar
- 24.Lamport, L.: A temporal logic of actions. ACM Trans. on Prog. Lang. and Systems 16(3), 872–923 (1994)CrossRefGoogle Scholar
- 25.Manna, Z., Pnueli, A.: The Temporal Logic of Reactive and Concurrent Systems – Specification. Springer, Heidelberg (1992)CrossRefMATHGoogle Scholar
- 26.Martí-Oliet, N., Pita, I., Fiadeiro, J.L., Meseguer, J., Maibaum, T.S.E.: A verification logic for rewriting logic. J. Log. Comput. 15(3), 317–352 (2005)MathSciNetCrossRefMATHGoogle Scholar
- 27.Meseguer, J.: The temporal logic of rewriting. Tech. Rep. UIUCDCS-R-2007-2815, CS Dept., University of Illinois at Urbana-Champaign (February 2007) (revised) (November 2007)Google Scholar
- 28.Meseguer, J.: Conditional rewriting logic as a unified model of concurrency. Theoretical Computer Science 96(1), 73–155 (1992)MathSciNetCrossRefMATHGoogle Scholar
- 29.Meseguer, J.: The temporal logic of rewriting: A gentle introduction. In: Degano, P., De Nicola, R., Meseguer, J. (eds.) Concurrency, Graphs and Models. LNCS, vol. 5065, pp. 354–382. Springer, Heidelberg (2008)CrossRefGoogle Scholar
- 30.Meseguer, J., Palomino, M., Martí-Oliet, N.: Equational abstractions. In: Baader, F. (ed.) CADE 2003. LNCS (LNAI), vol. 2741, pp. 2–16. Springer, Heidelberg (2003)CrossRefGoogle Scholar
- 31.Misra, J.: A Discipline of Multiprogramming. Springer, Heidelberg (2001)CrossRefMATHGoogle Scholar
- 32.Nicola, R.D., Vaandrager, F.W.: Action versus state based logics for transition systems. In: Guessarian, I. (ed.) LITP 1990. LNCS, vol. 469, pp. 407–419. Springer, Heidelberg (1990)CrossRefGoogle Scholar
- 33.Pecheur, C., Raimondi, F.: Symbolic model checking of logics with actions. In: Edelkamp, S., Lomuscio, A. (eds.) MoChArt IV. LNCS (LNAI), vol. 4428, pp. 113–128. Springer, Heidelberg (2007)CrossRefGoogle Scholar
- 34.Somenzi, F., Bloem, R.: Efficient büchi automata from ltl formulae. In: Emerson, E.A., Sistla, A.P. (eds.) CAV 2000. LNCS, vol. 1855, pp. 248–263. Springer, Heidelberg (2000)CrossRefGoogle Scholar
- 35.Viry, P.: Equational rules for rewriting logic. Theoretical Computer Science 285, 487–517 (2002)MathSciNetCrossRefMATHGoogle Scholar